diff options
Diffstat (limited to 'src/soc/intel/common/block')
| -rw-r--r-- | src/soc/intel/common/block/fast_spi/fast_spi.c | 18 | ||||
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/fast_spi.h | 9 |
2 files changed, 26 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c index 078e0ae1f1..87cafb976e 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi.c +++ b/src/soc/intel/common/block/fast_spi/fast_spi.c @@ -274,3 +274,21 @@ void fast_spi_early_init(uintptr_t spi_base_address) /* Initialize SPI to allow BIOS to write/erase on flash. */ fast_spi_init(); } + +/* Read SPI Write Protect disable status. */ +bool fast_spi_wpd_status(void) +{ + return pci_read_config16(PCH_DEV_SPI, SPIBAR_BIOS_CONTROL) & + SPIBAR_BIOS_CONTROL_WPD; +} + +/* Enable SPI Write Protect. */ +void fast_spi_enable_wp(void) +{ + device_t dev = PCH_DEV_SPI; + uint8_t bios_cntl; + + bios_cntl = pci_read_config8(dev, SPIBAR_BIOS_CONTROL); + bios_cntl &= ~SPIBAR_BIOS_CONTROL_WPD; + pci_write_config8(dev, SPIBAR_BIOS_CONTROL, bios_cntl); +} diff --git a/src/soc/intel/common/block/include/intelblocks/fast_spi.h b/src/soc/intel/common/block/include/intelblocks/fast_spi.h index 086143bc5f..6499ca5f5c 100644 --- a/src/soc/intel/common/block/include/intelblocks/fast_spi.h +++ b/src/soc/intel/common/block/include/intelblocks/fast_spi.h @@ -74,11 +74,18 @@ void fast_spi_cache_bios_region(void); * Caching. */ void fast_spi_early_init(uintptr_t spi_base_address); - /* * Fast SPI flash controller structure to allow SoCs to define bus-controller * mapping. */ extern const struct spi_ctrlr fast_spi_flash_ctrlr; +/* + * Read SPI Write protect disable bit. + */ +bool fast_spi_wpd_status(void); +/* + * Enable SPI Write protect. + */ +void fast_spi_enable_wp(void); #endif /* SOC_INTEL_COMMON_BLOCK_FAST_SPI_H */ |