diff options
Diffstat (limited to 'src/soc/intel/common/lpss_i2c.h')
-rw-r--r-- | src/soc/intel/common/lpss_i2c.h | 81 |
1 files changed, 80 insertions, 1 deletions
diff --git a/src/soc/intel/common/lpss_i2c.h b/src/soc/intel/common/lpss_i2c.h index 82594147fd..1ca23b59e8 100644 --- a/src/soc/intel/common/lpss_i2c.h +++ b/src/soc/intel/common/lpss_i2c.h @@ -20,6 +20,45 @@ #include <stdint.h> /* + * Timing values are in units of clock period, with the clock speed + * provided by the SOC in CONFIG_SOC_INTEL_COMMON_LPSS_I2C_CLOCK_MHZ. + * Automatic configuration is done based on requested speed, but the + * values may need tuned depending on the board and the number of + * devices present on the bus. + */ +struct lpss_i2c_speed_config { + enum i2c_speed speed; + /* SCL high and low period count */ + uint16_t scl_lcnt; + uint16_t scl_hcnt; + /* + * SDA hold time should be 300ns in standard and fast modes + * and long enough for deterministic logic level change in + * fast-plus and high speed modes. + * + * [15:0] SDA TX Hold Time + * [23:16] SDA RX Hold Time + */ + uint32_t sda_hold; +}; + +/* + * This I2C controller has support for 3 independent speed configs but can + * support both FAST_PLUS and HIGH speeds through the same set of speed + * config registers. These are treated separately so the speed config values + * can be provided via ACPI to the OS. + */ +#define LPSS_I2C_SPEED_CONFIG_COUNT 4 + +#define LPSS_I2C_SPEED_CONFIG(speedval,lcnt,hcnt,hold) \ + { \ + .speed = I2C_SPEED_ ## speedval, \ + .scl_lcnt = (lcnt), \ + .scl_hcnt = (hcnt), \ + .sda_hold = (hold), \ + } + +/* * Return the base address for this bus controller. * * This function *must* be implemented by the SOC and return the appropriate @@ -28,6 +67,46 @@ uintptr_t lpss_i2c_base_address(unsigned bus); /* + * Generate speed configuration for requested controller and bus speed. + * + * This allows a SOC or board to automatically generate speed config to use + * in firmware and provide to the OS. + */ +int lpss_i2c_gen_speed_config(enum i2c_speed speed, + struct lpss_i2c_speed_config *config); + +/* + * Set raw speed configuration for given speed type. + * + * This allows a SOC or board to override the automatic bus speed calculation + * and provided specific values for the driver to use. + */ +int lpss_i2c_set_speed_config(unsigned bus, + const struct lpss_i2c_speed_config *config); + +/* + * Write ACPI object to describe speed configuration. + * + * ACPI Object: Name ("xxxx", Package () { scl_lcnt, scl_hcnt, sda_hold } + * + * SSCN: I2C_SPEED_STANDARD + * FMCN: I2C_SPEED_FAST + * FPCN: I2C_SPEED_FAST_PLUS + * HSCN: I2C_SPEED_HIGH + */ +void lpss_i2c_acpi_write_speed_config( + const struct lpss_i2c_speed_config *config); + +/* + * Set I2C bus speed for this controller. + * + * This allows an SOC or board to set the basic I2C bus speed. Values for the + * controller configuration registers will be calculated, for more specific + * control the raw configuration can be provided to lpss_i2c_set_speed_config(). + */ +int lpss_i2c_set_speed(unsigned bus, enum i2c_speed speed); + +/* * Initialize this bus controller and set the speed. * * The bus speed can be passed in Hz or using values from device/i2c.h and @@ -36,6 +115,6 @@ uintptr_t lpss_i2c_base_address(unsigned bus); * The SOC *must* define CONFIG_SOC_INTEL_COMMON_LPSS_I2C_CLOCK for the * bus speed calculation to be correct. */ -void lpss_i2c_init(unsigned bus, enum i2c_speed speed); +int lpss_i2c_init(unsigned bus, enum i2c_speed speed); #endif |