diff options
Diffstat (limited to 'src/soc/intel/common')
| -rw-r--r-- | src/soc/intel/common/acpi_wake_source.c | 1 | ||||
| -rw-r--r-- | src/soc/intel/common/block/fast_spi/fast_spi.c | 1 | ||||
| -rw-r--r-- | src/soc/intel/common/block/smm/smihandler.c | 1 | ||||
| -rw-r--r-- | src/soc/intel/common/block/systemagent/memmap.c | 1 |
4 files changed, 0 insertions, 4 deletions
diff --git a/src/soc/intel/common/acpi_wake_source.c b/src/soc/intel/common/acpi_wake_source.c index f66706c4cd..389807e48c 100644 --- a/src/soc/intel/common/acpi_wake_source.c +++ b/src/soc/intel/common/acpi_wake_source.c @@ -19,7 +19,6 @@ #include <console/console.h> #include <soc/nvs.h> #include <stdint.h> -#include <stdlib.h> #include "acpi.h" __weak int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0) diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c index 5c29addcc9..019976ad8c 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi.c +++ b/src/soc/intel/common/block/fast_spi/fast_spi.c @@ -25,7 +25,6 @@ #include <soc/pci_devs.h> #include <spi_flash.h> #include <spi-generic.h> -#include <stdlib.h> /* * Get the FAST_SPIBAR. diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c index 0581d23021..4677d27943 100644 --- a/src/soc/intel/common/block/smm/smihandler.c +++ b/src/soc/intel/common/block/smm/smihandler.c @@ -38,7 +38,6 @@ #include <soc/smbus.h> #include <spi-generic.h> #include <stdint.h> -#include <stdlib.h> /* GNVS needs to be set by coreboot initiating a software SMI. */ static struct global_nvs_t *gnvs; diff --git a/src/soc/intel/common/block/systemagent/memmap.c b/src/soc/intel/common/block/systemagent/memmap.c index 2b0fdc4e14..487c1d885d 100644 --- a/src/soc/intel/common/block/systemagent/memmap.c +++ b/src/soc/intel/common/block/systemagent/memmap.c @@ -20,7 +20,6 @@ #include <cpu/x86/mtrr.h> #include <cpu/x86/smm.h> #include <intelblocks/systemagent.h> -#include <stdlib.h> /* * Expected Host Memory Map (we don't know 100% and not all regions are present on all SoCs): |