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-rw-r--r--src/soc/intel/common/block/acpi/acpi/northbridge.asl6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/common/block/acpi/acpi/northbridge.asl b/src/soc/intel/common/block/acpi/acpi/northbridge.asl
index bac059076a..b4b746542e 100644
--- a/src/soc/intel/common/block/acpi/acpi/northbridge.asl
+++ b/src/soc/intel/common/block/acpi/acpi/northbridge.asl
@@ -253,17 +253,17 @@ Device (PDRC)
/* MCH BAR _BAS will be updated in _CRS below according to
* B0:D0:F0:Reg.48h
*/
- Memory32Fixed (ReadWrite, 0, 0x08000, MCHB)
+ Memory32Fixed (ReadWrite, 0, MCH_BASE_SIZE, MCHB)
/* DMI BAR _BAS will be updated in _CRS below according to
* B0:D0:F0:Reg.68h
*/
- Memory32Fixed (ReadWrite, 0, 0x01000, DMIB)
+ Memory32Fixed (ReadWrite, 0, DMI_BASE_SIZE, DMIB)
/* EP BAR _BAS will be updated in _CRS below according to
* B0:D0:F0:Reg.40h
*/
- Memory32Fixed (ReadWrite, 0, 0x01000, EGPB)
+ Memory32Fixed (ReadWrite, 0, EP_BASE_SIZE, EGPB)
/* PCI Express BAR _BAS and _LEN will be updated in
* _CRS below according to B0:D0:F0:Reg.60h