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-rw-r--r--src/soc/intel/denverton_ns/acpi.c2
-rw-r--r--src/soc/intel/denverton_ns/bootblock/bootblock.c1
-rw-r--r--src/soc/intel/denverton_ns/chip.c1
-rw-r--r--src/soc/intel/denverton_ns/include/soc/romstage.h1
-rw-r--r--src/soc/intel/denverton_ns/lpc.c1
-rw-r--r--src/soc/intel/denverton_ns/smm.c1
-rw-r--r--src/soc/intel/denverton_ns/tsc_freq.c1
-rw-r--r--src/soc/intel/denverton_ns/upd_display.c1
8 files changed, 1 insertions, 8 deletions
diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c
index 71e396004f..a75a182fd7 100644
--- a/src/soc/intel/denverton_ns/acpi.c
+++ b/src/soc/intel/denverton_ns/acpi.c
@@ -18,11 +18,11 @@
#include <arch/acpi.h>
#include <arch/acpigen.h>
+#include <arch/cpu.h>
#include <arch/smp/mpspec.h>
#include <cpu/x86/smm.h>
#include <string.h>
#include <device/pci.h>
-#include <cpu/cpu.h>
#include <cbmem.h>
#include <soc/acpi.h>
diff --git a/src/soc/intel/denverton_ns/bootblock/bootblock.c b/src/soc/intel/denverton_ns/bootblock/bootblock.c
index 8b0c356aa0..7325ecb571 100644
--- a/src/soc/intel/denverton_ns/bootblock/bootblock.c
+++ b/src/soc/intel/denverton_ns/bootblock/bootblock.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/cpu.h>
#include <bootblock_common.h>
#include <cpu/x86/mtrr.h>
#include <device/pci.h>
diff --git a/src/soc/intel/denverton_ns/chip.c b/src/soc/intel/denverton_ns/chip.c
index 05dcb76bd3..dfb6d2ee74 100644
--- a/src/soc/intel/denverton_ns/chip.c
+++ b/src/soc/intel/denverton_ns/chip.c
@@ -20,7 +20,6 @@
#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
-#include <cpu/cpu.h>
#include <device/device.h>
#include <device/pci.h>
#include <fsp/api.h>
diff --git a/src/soc/intel/denverton_ns/include/soc/romstage.h b/src/soc/intel/denverton_ns/include/soc/romstage.h
index 2c6c5ce890..6ec7cbedc4 100644
--- a/src/soc/intel/denverton_ns/include/soc/romstage.h
+++ b/src/soc/intel/denverton_ns/include/soc/romstage.h
@@ -18,7 +18,6 @@
#ifndef _SOC_DENVERTON_NS_ROMSTAGE_H_
#define _SOC_DENVERTON_NS_ROMSTAGE_H_
-#include <arch/cpu.h>
#include <fsp/api.h>
/* These functions are weak and can be overridden by a mainboard functions. */
diff --git a/src/soc/intel/denverton_ns/lpc.c b/src/soc/intel/denverton_ns/lpc.c
index 0e1a95de45..dbc5eccf96 100644
--- a/src/soc/intel/denverton_ns/lpc.c
+++ b/src/soc/intel/denverton_ns/lpc.c
@@ -21,7 +21,6 @@
#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
-#include <cpu/cpu.h>
#include <cpu/x86/smm.h>
#include <bootstate.h>
diff --git a/src/soc/intel/denverton_ns/smm.c b/src/soc/intel/denverton_ns/smm.c
index 732aed4326..9d3fa75a6a 100644
--- a/src/soc/intel/denverton_ns/smm.c
+++ b/src/soc/intel/denverton_ns/smm.c
@@ -20,7 +20,6 @@
#include <device/pci.h>
#include <console/console.h>
#include <arch/io.h>
-#include <cpu/cpu.h>
#include <cpu/x86/smm.h>
#include <string.h>
diff --git a/src/soc/intel/denverton_ns/tsc_freq.c b/src/soc/intel/denverton_ns/tsc_freq.c
index 6bf2a48d13..0e268b3780 100644
--- a/src/soc/intel/denverton_ns/tsc_freq.c
+++ b/src/soc/intel/denverton_ns/tsc_freq.c
@@ -17,7 +17,6 @@
#include <cpu/x86/msr.h>
#include <cpu/x86/tsc.h>
-#include <arch/cpu.h>
#include <soc/cpu.h>
#include <soc/msr.h>
diff --git a/src/soc/intel/denverton_ns/upd_display.c b/src/soc/intel/denverton_ns/upd_display.c
index 076ffec8d7..4f4e1bfcf9 100644
--- a/src/soc/intel/denverton_ns/upd_display.c
+++ b/src/soc/intel/denverton_ns/upd_display.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/cpu.h>
#include <console/console.h>
#include <fsp/util.h>
#include <lib.h>