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-rw-r--r--src/soc/intel/denverton_ns/Kconfig1
-rw-r--r--src/soc/intel/denverton_ns/cpu.c8
2 files changed, 3 insertions, 6 deletions
diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig
index 798d473cad..89bbbb0c45 100644
--- a/src/soc/intel/denverton_ns/Kconfig
+++ b/src/soc/intel/denverton_ns/Kconfig
@@ -34,6 +34,7 @@ config CPU_SPECIFIC_OPTIONS
select TSC_SYNC_MFENCE
select UDELAY_TSC
select UDK_2015_BINDING
+ select CPU_INTEL_COMMON
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/soc/intel/denverton_ns/cpu.c b/src/soc/intel/denverton_ns/cpu.c
index b1eda9b54d..7cee5be39d 100644
--- a/src/soc/intel/denverton_ns/cpu.c
+++ b/src/soc/intel/denverton_ns/cpu.c
@@ -9,6 +9,7 @@
#include <cpu/intel/smm_reloc.h>
#include <cpu/intel/em64t100_save_state.h>
#include <cpu/intel/turbo.h>
+#include <cpu/intel/common/common.h>
#include <device/device.h>
#include <device/pci.h>
#include <intelblocks/cpulib.h>
@@ -59,12 +60,7 @@ static void denverton_core_init(struct device *cpu)
msr.lo |= FAST_STRINGS_ENABLE_BIT;
wrmsr(IA32_MISC_ENABLE, msr);
- /* Lock AES-NI only if supported */
- if (cpuid_ecx(1) & (1 << 25)) {
- msr = rdmsr(MSR_FEATURE_CONFIG);
- msr.lo |= FEATURE_CONFIG_LOCK; /* Lock AES-NI */
- wrmsr(MSR_FEATURE_CONFIG, msr);
- }
+ set_aesni_lock();
/* Enable Turbo */
enable_turbo();