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Diffstat (limited to 'src/soc/intel/denverton_ns')
-rw-r--r--src/soc/intel/denverton_ns/bootblock/uart.c7
-rw-r--r--src/soc/intel/denverton_ns/memmap.c7
-rw-r--r--src/soc/intel/denverton_ns/romstage.c12
-rw-r--r--src/soc/intel/denverton_ns/smihandler.c6
4 files changed, 25 insertions, 7 deletions
diff --git a/src/soc/intel/denverton_ns/bootblock/uart.c b/src/soc/intel/denverton_ns/bootblock/uart.c
index 9af42ee217..7d97661bfb 100644
--- a/src/soc/intel/denverton_ns/bootblock/uart.c
+++ b/src/soc/intel/denverton_ns/bootblock/uart.c
@@ -31,8 +31,11 @@ static void pci_early_hsuart_device_probe(u8 bus, u8 dev, u8 func,
u32 mmio_base)
{
register uint16_t reg16;
-
- device_t uart_dev = PCI_DEV(bus, dev, func);
+#if defined(__SIMPLE_DEVICE__)
+ pci_devfn_t uart_dev = PCI_DEV(bus, dev, func);
+#else
+ struct device *uart_dev = PCI_DEV(bus, dev, func);
+#endif
/* We're using MMIO for HSUARTs. This section is needed for logging
* from FSP only
diff --git a/src/soc/intel/denverton_ns/memmap.c b/src/soc/intel/denverton_ns/memmap.c
index 3fe41d2088..813d5c6553 100644
--- a/src/soc/intel/denverton_ns/memmap.c
+++ b/src/soc/intel/denverton_ns/memmap.c
@@ -30,8 +30,11 @@
/* Returns base of requested region encoded in the system agent. */
static inline uintptr_t system_agent_region_base(size_t reg)
{
- device_t dev = SA_DEV_ROOT;
-
+#if defined(__SIMPLE_DEVICE__)
+ pci_devfn_t dev = SA_DEV_ROOT;
+#else
+ struct device *dev = SA_DEV_ROOT;
+#endif
/* All regions concerned for have 1 MiB alignment. */
return ALIGN_DOWN(pci_read_config32(dev, reg), 1 * MiB);
}
diff --git a/src/soc/intel/denverton_ns/romstage.c b/src/soc/intel/denverton_ns/romstage.c
index 105298e8b0..3da349a63f 100644
--- a/src/soc/intel/denverton_ns/romstage.c
+++ b/src/soc/intel/denverton_ns/romstage.c
@@ -50,7 +50,11 @@ static void display_fsp_smbios_memory_info_hob(void)
static void early_pmc_init(void)
{
/* PMC (B0:D31:F2). */
- device_t dev = PCH_PMC_DEV;
+#if defined(__SIMPLE_DEVICE__)
+ pci_devfn_t dev = PCH_PMC_DEV;
+#else
+ struct device *dev = PCH_PMC_DEV;
+#endif
/* Is PMC present */
if (pci_read_config16(dev, 0) == 0xffff) {
@@ -99,7 +103,11 @@ static void early_pmc_init(void)
static void early_tco_init(void)
{
/* SMBUS (B0:D31:F4). */
- device_t dev = PCI_DEV(0, SMBUS_DEV, SMBUS_FUNC);
+#if defined(__SIMPLE_DEVICE__)
+ pci_devfn_t dev = PCI_DEV(0, SMBUS_DEV, SMBUS_FUNC);
+#else
+ struct device *dev = PCI_DEV(0, SMBUS_DEV, SMBUS_FUNC);
+#endif
/* Configure TCO base address */
if (pci_read_config16(dev, TCOBASE) == 0xffff) {
diff --git a/src/soc/intel/denverton_ns/smihandler.c b/src/soc/intel/denverton_ns/smihandler.c
index e434c1cd3f..d97bc24f59 100644
--- a/src/soc/intel/denverton_ns/smihandler.c
+++ b/src/soc/intel/denverton_ns/smihandler.c
@@ -65,7 +65,11 @@ static void busmaster_disable_on_bus(int bus)
for (slot = 0; slot < 0x20; slot++) {
for (func = 0; func < 8; func++) {
u32 reg32;
- device_t dev = PCI_DEV(bus, slot, func);
+#if defined(__SIMPLE_DEVICE__)
+ pci_devfn_t dev = PCI_DEV(bus, slot, func);
+#else
+ struct device *dev = PCI_DEV(bus, slot, func);
+#endif
val = pci_read_config32(dev, PCI_VENDOR_ID);