4 files changed, 11 insertions, 26 deletions
diff --git a/src/soc/intel/fsp_broadwell_de/cpu.c b/src/soc/intel/fsp_broadwell_de/cpu.c
index 0b933c5db7..db33f2eb6b 100644
--- a/src/soc/intel/fsp_broadwell_de/cpu.c
+++ b/src/soc/intel/fsp_broadwell_de/cpu.c
@@ -19,6 +19,7 @@
 #include <console/console.h>
 #include <cpu/cpu.h>
 #include <cpu/intel/microcode.h>
+#include <cpu/intel/smm_reloc.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/x86/mp.h>
@@ -99,7 +100,7 @@ static void post_mp_init(void)
 	set_max_ratio();
 	/* Now that all APs have been relocated as well as the BSP let SMIs
 	   start flowing. */
-	southbridge_smm_enable_smi();
+	smm_southbridge_enable_smi();
 
 	/* Set SMI lock bits. */
 	smm_lock();
diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/smm.h b/src/soc/intel/fsp_broadwell_de/include/soc/smm.h
index 72aa7fa4f2..76b177466e 100644
--- a/src/soc/intel/fsp_broadwell_de/include/soc/smm.h
+++ b/src/soc/intel/fsp_broadwell_de/include/soc/smm.h
@@ -54,24 +54,4 @@ static inline int smm_region_size(void)
 	return CONFIG_SMM_TSEG_SIZE;
 }
 
-void smm_relocation_handler(int cpu, uintptr_t curr_smbase,
-				uintptr_t staggered_smbase);
-void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
-		size_t *smm_save_state_size);
-void smm_initialize(void);
-void smm_relocate(void);
-void smm_lock(void);
-
-/* These helpers are for performing SMM relocation. */
-void southbridge_trigger_smi(void);
-void southbridge_clear_smi_status(void);
-
-/*
- * The initialization of the southbridge is split into 2 components. One is
- * for clearing the state in the SMM registers. The other is for enabling
- * SMIs. They are split so that other work between the 2 actions.
- */
-void southbridge_smm_clear_state(void);
-void southbridge_smm_enable_smi(void);
-
 #endif
diff --git a/src/soc/intel/fsp_broadwell_de/smi.c b/src/soc/intel/fsp_broadwell_de/smi.c
index 5411bcaed0..299ba531c5 100644
--- a/src/soc/intel/fsp_broadwell_de/smi.c
+++ b/src/soc/intel/fsp_broadwell_de/smi.c
@@ -16,12 +16,13 @@
  */
 
 #include <console/console.h>
+#include <cpu/intel/smm_reloc.h>
 #include <arch/io.h>
 #include <soc/iomap.h>
 #include <soc/lpc.h>
 #include <soc/smm.h>
 
-void southbridge_smm_clear_state(void)
+void smm_southbridge_clear_state(void)
 {
 	u32 smi_en;
 
@@ -41,7 +42,9 @@ void southbridge_smm_clear_state(void)
 	clear_pm1_status();
 }
 
-void southbridge_smm_enable_smi(void)
+static void southbridge_clear_smi_status(void);
+
+void smm_southbridge_enable_smi(void)
 {
 	printk(BIOS_DEBUG, "Enabling SMIs.\n");
 
@@ -54,7 +57,7 @@ void southbridge_smm_enable_smi(void)
 	enable_smi(EOS | GBL_SMI_EN);
 }
 
-void southbridge_trigger_smi(void)
+static void  __unused southbridge_trigger_smi(void)
 {
 	/*
 	 * There are several methods of raising a controlled SMI# via
@@ -74,7 +77,7 @@ void southbridge_trigger_smi(void)
 	outb(0x00, 0xb2);
 }
 
-void southbridge_clear_smi_status(void)
+static void southbridge_clear_smi_status(void)
 {
 	/* Clear SMI status */
 	clear_smi_status();
diff --git a/src/soc/intel/fsp_broadwell_de/smmrelocate.c b/src/soc/intel/fsp_broadwell_de/smmrelocate.c
index 13d48c067c..bd491c785d 100644
--- a/src/soc/intel/fsp_broadwell_de/smmrelocate.c
+++ b/src/soc/intel/fsp_broadwell_de/smmrelocate.c
@@ -24,6 +24,7 @@
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/smm.h>
 #include <cpu/intel/em64t101_save_state.h>
+#include <cpu/intel/smm_reloc.h>
 #include <console/console.h>
 #include <device/pci_ops.h>
 #include <soc/lpc.h>
@@ -296,7 +297,7 @@ void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
 void smm_initialize(void)
 {
 	/* Clear the SMM state in the southbridge. */
-	southbridge_smm_clear_state();
+	smm_southbridge_clear_state();
 
 	/* Run the relocation handler for on the BSP to check and set up
 	   parallel SMM relocation. */