diff options
Diffstat (limited to 'src/soc/intel/icelake')
-rw-r--r-- | src/soc/intel/icelake/bootblock/pch.c | 2 | ||||
-rw-r--r-- | src/soc/intel/icelake/cpu.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/icelake/bootblock/pch.c b/src/soc/intel/icelake/bootblock/pch.c index aefcaa5a47..e95220b90e 100644 --- a/src/soc/intel/icelake/bootblock/pch.c +++ b/src/soc/intel/icelake/bootblock/pch.c @@ -72,7 +72,7 @@ static void soc_config_pwrmbase(void) /* Enable Bus Master and MMIO Space */ reg32 = pci_read_config32(PCH_DEV_PMC, PCI_COMMAND); - reg32 |= PCI_COMMAND_MEMORY; + reg32 |= PCI_COMMAND_MEMORY; pci_write_config32(PCH_DEV_PMC, PCI_COMMAND, reg32); /* Enable PWRM in PMC */ diff --git a/src/soc/intel/icelake/cpu.c b/src/soc/intel/icelake/cpu.c index 0ecccb94e5..a2d9f7a6bc 100644 --- a/src/soc/intel/icelake/cpu.c +++ b/src/soc/intel/icelake/cpu.c @@ -127,7 +127,7 @@ static void enable_pm_timer_emulation(void) * frequency is used. */ msr.hi = (3579545ULL << 32) / CTC_FREQ; - /* Set PM1 timer IO port and enable*/ + /* Set PM1 timer IO port and enable */ msr.lo = (EMULATE_DELAY_VALUE << EMULATE_DELAY_OFFSET_VALUE) | EMULATE_PM_TMR_EN | (ACPI_BASE_ADDRESS + PM1_TMR); wrmsr(MSR_EMULATE_PM_TIMER, msr); |