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-rw-r--r--src/soc/intel/quark/memmap.c27
-rw-r--r--src/soc/intel/quark/romstage/fsp2_0.c25
2 files changed, 27 insertions, 25 deletions
diff --git a/src/soc/intel/quark/memmap.c b/src/soc/intel/quark/memmap.c
index d67856cc74..b8b85063a8 100644
--- a/src/soc/intel/quark/memmap.c
+++ b/src/soc/intel/quark/memmap.c
@@ -13,6 +13,8 @@
* GNU General Public License for more details.
*/
+#include <arch/cpu.h>
+#include <arch/romstage.h>
#include <cbmem.h>
#include <soc/reg_access.h>
@@ -32,3 +34,28 @@ void *cbmem_top(void)
/* Return the top of memory */
return (void *)top_of_memory;
}
+
+void fill_postcar_frame(struct postcar_frame *pcf)
+{
+ uintptr_t top_of_ram;
+ uintptr_t top_of_low_usable_memory;
+
+ /* Locate the top of RAM */
+ top_of_low_usable_memory = (uintptr_t) cbmem_top();
+ top_of_ram = ALIGN(top_of_low_usable_memory, 16 * MiB);
+
+ /* Cache postcar and ramstage */
+ postcar_frame_add_mtrr(pcf, top_of_ram - (16 * MiB), 16 * MiB,
+ MTRR_TYPE_WRBACK);
+
+ /* Cache RMU area */
+ postcar_frame_add_mtrr(pcf, (uintptr_t) top_of_low_usable_memory,
+ 0x10000, MTRR_TYPE_WRTHROUGH);
+
+ /* Cache ESRAM */
+ postcar_frame_add_mtrr(pcf, 0x80000000, 0x80000, MTRR_TYPE_WRBACK);
+
+ pcf->skip_common_mtrr = 1;
+ /* Cache SPI flash - Write protect not supported */
+ postcar_frame_add_romcache(pcf, MTRR_TYPE_WRTHROUGH);
+}
diff --git a/src/soc/intel/quark/romstage/fsp2_0.c b/src/soc/intel/quark/romstage/fsp2_0.c
index bd30271d77..57e35eeb3c 100644
--- a/src/soc/intel/quark/romstage/fsp2_0.c
+++ b/src/soc/intel/quark/romstage/fsp2_0.c
@@ -66,31 +66,6 @@ asmlinkage void car_stage_c_entry(void)
/* We do not return here. */
}
-void fill_postcar_frame(struct postcar_frame *pcf)
-{
- uintptr_t top_of_ram;
- uintptr_t top_of_low_usable_memory;
-
- /* Locate the top of RAM */
- top_of_low_usable_memory = (uintptr_t) cbmem_top();
- top_of_ram = ALIGN(top_of_low_usable_memory, 16 * MiB);
-
- /* Cache postcar and ramstage */
- postcar_frame_add_mtrr(pcf, top_of_ram - (16 * MiB), 16 * MiB,
- MTRR_TYPE_WRBACK);
-
- /* Cache RMU area */
- postcar_frame_add_mtrr(pcf, (uintptr_t) top_of_low_usable_memory,
- 0x10000, MTRR_TYPE_WRTHROUGH);
-
- /* Cache ESRAM */
- postcar_frame_add_mtrr(pcf, 0x80000000, 0x80000, MTRR_TYPE_WRBACK);
-
- pcf->skip_common_mtrr = 1;
- /* Cache SPI flash - Write protect not supported */
- postcar_frame_add_romcache(pcf, MTRR_TYPE_WRTHROUGH);
-}
-
static struct chipset_power_state power_state;
struct chipset_power_state *get_power_state(void)