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Diffstat (limited to 'src/soc/intel/skylake/acpi/xhci.asl')
-rw-r--r--src/soc/intel/skylake/acpi/xhci.asl4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/acpi/xhci.asl b/src/soc/intel/skylake/acpi/xhci.asl
index 29367de6dd..a23d78abd9 100644
--- a/src/soc/intel/skylake/acpi/xhci.asl
+++ b/src/soc/intel/skylake/acpi/xhci.asl
@@ -195,8 +195,8 @@ Device (XHCI)
Store (3, ^UPSW)
/* Enable d3hot and SS link trunk clock gating */
- Store(One, ^D3HE)
- Store(One, ^STGE)
+ Store(One, ^D3HE)
+ Store(One, ^STGE)
/* Now put device in D3 */
Store (3, Local0)