diff options
Diffstat (limited to 'src/soc/intel/skylake/chip.c')
| -rw-r--r-- | src/soc/intel/skylake/chip.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index 61975c648c..ab069488a0 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -182,7 +182,7 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params) * To disable Heci, the Psf needs to be left unlocked * by FSP after end of post sequence. Based on the devicetree * setting, we set the appropriate PsfUnlock policy in Fsp, - * do the changes and then lock it back in Coreboot + * do the changes and then lock it back in coreboot * */ if (config->HeciEnabled == 0) |