summaryrefslogtreecommitdiff
path: root/src/soc/intel/skylake/include/soc/pcr_ids.h
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/intel/skylake/include/soc/pcr_ids.h')
-rw-r--r--src/soc/intel/skylake/include/soc/pcr_ids.h35
1 files changed, 35 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/include/soc/pcr_ids.h b/src/soc/intel/skylake/include/soc/pcr_ids.h
new file mode 100644
index 0000000000..71affd8eea
--- /dev/null
+++ b/src/soc/intel/skylake/include/soc/pcr_ids.h
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef SOC_INTEL_SKL_PCR_H
+#define SOC_INTEL_SKL_PCR_H
+
+/*
+ * Port ids
+ */
+#define PID_PSTH 0x89
+#define PID_GPIOCOM3 0xAC
+#define PID_GPIOCOM2 0xAD
+#define PID_GPIOCOM1 0xAE
+#define PID_GPIOCOM0 0xAF
+#define PID_PSF1 0xBA
+#define PID_SCS 0xC0
+#define PID_RTC 0xC3
+#define PID_ITSS 0xC4
+#define PID_LPC 0xC7
+#define PID_SERIALIO 0xCB
+#define PID_DMI 0xEF
+
+#endif /* SOC_INTEL_SKL_PCR_H */