diff options
Diffstat (limited to 'src/soc/intel/skylake/lockdown.c')
| -rw-r--r-- | src/soc/intel/skylake/lockdown.c | 56 |
1 files changed, 47 insertions, 9 deletions
diff --git a/src/soc/intel/skylake/lockdown.c b/src/soc/intel/skylake/lockdown.c index 5bbf546de0..8c34fa73ed 100644 --- a/src/soc/intel/skylake/lockdown.c +++ b/src/soc/intel/skylake/lockdown.c @@ -16,6 +16,7 @@ #include <arch/io.h> #include <bootstate.h> #include <chip.h> +#include <intelblocks/fast_spi.h> #include <intelblocks/pcr.h> #include <soc/lpc.h> #include <soc/pci_devs.h> @@ -26,18 +27,12 @@ #define PCR_DMI_GCS 0x274C #define PCR_DMI_GCS_BILD (1 << 0) -static void lpc_lockdown_config(void) +static void lpc_lockdown_config(const struct soc_intel_skylake_config *config) { - static struct soc_intel_skylake_config *config; struct device *dev; uint8_t reg_mask = 0; dev = PCH_DEV_LPC; - /* Check if LPC is enabled, else return */ - if (dev == NULL || dev->chip_info == NULL) - return; - - config = dev->chip_info; /* Set Bios Interface Lock, Bios Lock */ if (config->chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT) @@ -62,14 +57,57 @@ static void pmc_lockdown_config(void) static void dmi_lockdown_config(void) { - /* GCS reg of DMI */ + /* + * GCS reg of DMI + * + * When set, prevents GCS.BBS from being changed + * GCS.BBS: (Boot BIOS Strap) This field determines the destination + * of accesses to the BIOS memory range. + * Bits Description + * “0b”: SPI + * “1b”: LPC/eSPI + */ pcr_or8(PID_DMI, PCR_DMI_GCS, PCR_DMI_GCS_BILD); } +static void spi_lockdown_config(const struct soc_intel_skylake_config *config) +{ + /* Set FAST_SPI opcode menu */ + fast_spi_set_opcode_menu(); + + /* Discrete Lock Flash PR registers */ + fast_spi_pr_dlock(); + + /* Lock FAST_SPIBAR */ + fast_spi_lock_bar(); + + /* Set Bios Interface Lock, Bios Lock */ + if (config->chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT) { + /* Bios Interface Lock */ + fast_spi_set_bios_interface_lock_down(); + + /* Bios Lock */ + fast_spi_set_lock_enable(); + } +} + static void platform_lockdown_config(void *unused) { + struct soc_intel_skylake_config *config; + struct device *dev; + + dev = PCH_DEV_SPI; + /* Check if device is valid, else return */ + if (dev == NULL || dev->chip_info == NULL) + return; + + config = dev->chip_info; + /* LPC lock down configuration */ - lpc_lockdown_config(); + lpc_lockdown_config(config); + + /* SPI lock down configuration */ + spi_lockdown_config(config); /* DMI lock down configuration */ dmi_lockdown_config(); |