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-rw-r--r--src/soc/intel/skylake/acpi.c10
-rw-r--r--src/soc/intel/skylake/bootblock/pch.c2
-rw-r--r--src/soc/intel/skylake/include/soc/pci_devs.h28
-rw-r--r--src/soc/intel/skylake/irq.c20
-rw-r--r--src/soc/intel/skylake/me.c4
5 files changed, 32 insertions, 32 deletions
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c
index d7114349d4..b3b999f53c 100644
--- a/src/soc/intel/skylake/acpi.c
+++ b/src/soc/intel/skylake/acpi.c
@@ -653,11 +653,11 @@ const char *soc_acpi_name(struct device *dev)
case PCH_DEVFN_I2C1: return "I2C1";
case PCH_DEVFN_I2C2: return "I2C2";
case PCH_DEVFN_I2C3: return "I2C3";
- case PCH_DEVFN_ME: return "MEI1";
- case PCH_DEVFN_ME_2: return "MEI2";
- case PCH_DEVFN_ME_IDER: return "MEID";
- case PCH_DEVFN_ME_KT: return "MEKT";
- case PCH_DEVFN_ME_3: return "MEI3";
+ case PCH_DEVFN_CSE: return "CSE1";
+ case PCH_DEVFN_CSE_2: return "CSE2";
+ case PCH_DEVFN_CSE_IDER: return "CSED";
+ case PCH_DEVFN_CSE_KT: return "CSKT";
+ case PCH_DEVFN_CSE_3: return "CSE3";
case PCH_DEVFN_SATA: return "SATA";
case PCH_DEVFN_UART2: return "UAR2";
case PCH_DEVFN_I2C4: return "I2C4";
diff --git a/src/soc/intel/skylake/bootblock/pch.c b/src/soc/intel/skylake/bootblock/pch.c
index 62054f14ac..60b22dc8e4 100644
--- a/src/soc/intel/skylake/bootblock/pch.c
+++ b/src/soc/intel/skylake/bootblock/pch.c
@@ -242,7 +242,7 @@ static void soc_config_rtc(void)
static void enable_heci(void)
{
- device_t dev = PCH_DEV_ME;
+ device_t dev = PCH_DEV_CSE;
u8 pcireg;
/* Assign Resources to HECI1 */
diff --git a/src/soc/intel/skylake/include/soc/pci_devs.h b/src/soc/intel/skylake/include/soc/pci_devs.h
index 10d480664d..469d7e9992 100644
--- a/src/soc/intel/skylake/include/soc/pci_devs.h
+++ b/src/soc/intel/skylake/include/soc/pci_devs.h
@@ -14,8 +14,8 @@
* GNU General Public License for more details.
*/
-#ifndef _SOC_PCI_DEVS_H_
-#define _SOC_PCI_DEVS_H_
+#ifndef _SOC_SKYLAKE_PCI_DEVS_H_
+#define _SOC_SKYLAKE_PCI_DEVS_H_
#include <device/pci_def.h>
#include <rules.h>
@@ -23,7 +23,7 @@
#define _SA_DEVFN(slot) PCI_DEVFN(SA_DEV_SLOT_ ## slot, 0)
#define _PCH_DEVFN(slot, func) PCI_DEVFN(PCH_DEV_SLOT_ ## slot, func)
-#if ENV_RAMSTAGE && !defined(__SIMPLE_DEVICE__)
+#if !defined(__SIMPLE_DEVICE__)
#include <device/device.h>
#include <device/pci_def.h>
#define _SA_DEV(slot) dev_find_slot(0, _SA_DEVFN(slot))
@@ -72,17 +72,17 @@
#define PCH_DEV_I2C2 _PCH_DEV(SIO1, 2)
#define PCH_DEV_I2C3 _PCH_DEV(SIO1, 3)
-#define PCH_DEV_SLOT_ME 0x16
-#define PCH_DEVFN_ME _PCH_DEVFN(ME, 0)
-#define PCH_DEVFN_ME_2 _PCH_DEVFN(ME, 1)
-#define PCH_DEVFN_ME_IDER _PCH_DEVFN(ME, 2)
-#define PCH_DEVFN_ME_KT _PCH_DEVFN(ME, 3)
-#define PCH_DEVFN_ME_3 _PCH_DEVFN(ME, 4)
-#define PCH_DEV_ME _PCH_DEV(ME, 0)
-#define PCH_DEV_ME_2 _PCH_DEV(ME, 1)
-#define PCH_DEV_ME_IDER _PCH_DEV(ME, 2)
-#define PCH_DEV_ME_KT _PCH_DEV(ME, 3)
-#define PCH_DEV_ME_3 _PCH_DEV(ME, 4)
+#define PCH_DEV_SLOT_CSE 0x16
+#define PCH_DEVFN_CSE _PCH_DEVFN(CSE, 0)
+#define PCH_DEVFN_CSE_2 _PCH_DEVFN(CSE, 1)
+#define PCH_DEVFN_CSE_IDER _PCH_DEVFN(CSE, 2)
+#define PCH_DEVFN_CSE_KT _PCH_DEVFN(CSE, 3)
+#define PCH_DEVFN_CSE_3 _PCH_DEVFN(CSE, 4)
+#define PCH_DEV_CSE _PCH_DEV(CSE, 0)
+#define PCH_DEV_CSE_2 _PCH_DEV(CSE, 1)
+#define PCH_DEV_CSE_IDER _PCH_DEV(CSE, 2)
+#define PCH_DEV_CSE_KT _PCH_DEV(CSE, 3)
+#define PCH_DEV_CSE_3 _PCH_DEV(CSE, 4)
#define PCH_DEV_SLOT_SATA 0x17
#define PCH_DEVFN_SATA _PCH_DEVFN(SATA, 0)
diff --git a/src/soc/intel/skylake/irq.c b/src/soc/intel/skylake/irq.c
index 6d3aa7b393..649f1375cb 100644
--- a/src/soc/intel/skylake/irq.c
+++ b/src/soc/intel/skylake/irq.c
@@ -157,20 +157,20 @@ static const SI_PCH_DEVICE_INTERRUPT_CONFIG devintconfig[] = {
DEVICE_INT_CONFIG(PCH_DEV_SLOT_SATA,
PCI_FUNC(PCH_DEVFN_SATA), int_A, SATA_IRQ),
/* CSME: HECI #1 */
- DEVICE_INT_CONFIG(PCH_DEV_SLOT_ME,
- PCI_FUNC(PCH_DEVFN_ME), int_A, HECI_1_IRQ),
+ DEVICE_INT_CONFIG(PCH_DEV_SLOT_CSE,
+ PCI_FUNC(PCH_DEVFN_CSE), int_A, HECI_1_IRQ),
/* CSME: HECI #2 */
- DEVICE_INT_CONFIG(PCH_DEV_SLOT_ME,
- PCI_FUNC(PCH_DEVFN_ME_2), int_B, HECI_2_IRQ),
+ DEVICE_INT_CONFIG(PCH_DEV_SLOT_CSE,
+ PCI_FUNC(PCH_DEVFN_CSE_2), int_B, HECI_2_IRQ),
/* CSME: IDE-Redirection (IDE-R) */
- DEVICE_INT_CONFIG(PCH_DEV_SLOT_ME,
- PCI_FUNC(PCH_DEVFN_ME_IDER), int_C, IDER_IRQ),
+ DEVICE_INT_CONFIG(PCH_DEV_SLOT_CSE,
+ PCI_FUNC(PCH_DEVFN_CSE_IDER), int_C, IDER_IRQ),
/* CSME: Keyboard and Text (KT) Redirection */
- DEVICE_INT_CONFIG(PCH_DEV_SLOT_ME,
- PCI_FUNC(PCH_DEVFN_ME_KT), int_D, KT_IRQ),
+ DEVICE_INT_CONFIG(PCH_DEV_SLOT_CSE,
+ PCI_FUNC(PCH_DEVFN_CSE_KT), int_D, KT_IRQ),
/* CSME: HECI #3 */
- DEVICE_INT_CONFIG(PCH_DEV_SLOT_ME,
- PCI_FUNC(PCH_DEVFN_ME_3), int_A, HECI_3_IRQ),
+ DEVICE_INT_CONFIG(PCH_DEV_SLOT_CSE,
+ PCI_FUNC(PCH_DEVFN_CSE_3), int_A, HECI_3_IRQ),
/*
* SerialIo I2C Controller #0, INTA is default,
* programmed in PCR[SERIALIO] + PCICFGCTRL[1]
diff --git a/src/soc/intel/skylake/me.c b/src/soc/intel/skylake/me.c
index 577437291f..5bc5c951f7 100644
--- a/src/soc/intel/skylake/me.c
+++ b/src/soc/intel/skylake/me.c
@@ -30,12 +30,12 @@
static inline u32 me_read_config32(int offset)
{
- return pci_read_config32(PCH_DEV_ME, offset);
+ return pci_read_config32(PCH_DEV_CSE, offset);
}
static inline void me_write_config32(int offset, u32 value)
{
- pci_write_config32(PCH_DEV_ME, offset, value);
+ pci_write_config32(PCH_DEV_CSE, offset, value);
}
static inline u32 me_read_mmio32(int offset)