diff options
Diffstat (limited to 'src/soc/intel/skylake')
| -rw-r--r-- | src/soc/intel/skylake/bootblock/bootblock.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/skylake/bootblock/pch.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/skylake/include/soc/bootblock.h | 2 | ||||
| -rw-r--r-- | src/soc/intel/skylake/include/soc/romstage.h | 2 | ||||
| -rw-r--r-- | src/soc/intel/skylake/romstage/pch.c | 6 | ||||
| -rw-r--r-- | src/soc/intel/skylake/romstage/romstage.c | 2 |
6 files changed, 8 insertions, 8 deletions
diff --git a/src/soc/intel/skylake/bootblock/bootblock.c b/src/soc/intel/skylake/bootblock/bootblock.c index d1fbb83b8a..26454e4b09 100644 --- a/src/soc/intel/skylake/bootblock/bootblock.c +++ b/src/soc/intel/skylake/bootblock/bootblock.c @@ -44,6 +44,6 @@ void bootblock_soc_init(void) * and abase, i2c programming and print platform info */ report_platform_info(); - pch_init(); + bootblock_pch_init(); gspi_early_bar_init(); } diff --git a/src/soc/intel/skylake/bootblock/pch.c b/src/soc/intel/skylake/bootblock/pch.c index 332060ed2d..ddf1139aa0 100644 --- a/src/soc/intel/skylake/bootblock/pch.c +++ b/src/soc/intel/skylake/bootblock/pch.c @@ -146,7 +146,7 @@ void pch_early_iorange_init(void) pch_enable_lpc(); } -void pch_init(void) +void bootblock_pch_init(void) { /* * Enabling ABASE for accessing PM1_STS, PM1_EN, PM1_CNT, diff --git a/src/soc/intel/skylake/include/soc/bootblock.h b/src/soc/intel/skylake/include/soc/bootblock.h index 302db50fb3..2121821126 100644 --- a/src/soc/intel/skylake/include/soc/bootblock.h +++ b/src/soc/intel/skylake/include/soc/bootblock.h @@ -24,7 +24,7 @@ void bootblock_pch_early_init(void); /* Bootblock post console init programming */ void i2c_early_init(void); -void pch_init(void); +void bootblock_pch_init(void); void pch_early_iorange_init(void); void report_platform_info(void); void report_memory_config(void); diff --git a/src/soc/intel/skylake/include/soc/romstage.h b/src/soc/intel/skylake/include/soc/romstage.h index 674652625b..bd98a2bba8 100644 --- a/src/soc/intel/skylake/include/soc/romstage.h +++ b/src/soc/intel/skylake/include/soc/romstage.h @@ -21,7 +21,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd); void systemagent_early_init(void); -void pch_init(void); +void romstage_pch_init(void); int smbus_read_byte(unsigned int device, unsigned int address); /* Board type */ enum board_type { diff --git a/src/soc/intel/skylake/romstage/pch.c b/src/soc/intel/skylake/romstage/pch.c index 88a7cc7163..8e783da6f9 100644 --- a/src/soc/intel/skylake/romstage/pch.c +++ b/src/soc/intel/skylake/romstage/pch.c @@ -17,11 +17,11 @@ #include <intelblocks/tco.h> #include <soc/romstage.h> -void pch_init(void) +void romstage_pch_init(void) { - /* Programming TCO_BASE_ADDRESS and TCO Timer Halt */ + /* Program TCO_BASE_ADDRESS and TCO Timer Halt */ tco_configure(); - /* Program SMBUS_BASE_ADDRESS and Enable it */ + /* Program SMBUS_BASE_ADDRESS and enable it */ smbus_common_init(); } diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c index d381caa104..51428dfe28 100644 --- a/src/soc/intel/skylake/romstage/romstage.c +++ b/src/soc/intel/skylake/romstage/romstage.c @@ -147,7 +147,7 @@ void mainboard_romstage_entry(void) /* Program MCHBAR, DMIBAR, GDXBAR and EDRAMBAR */ systemagent_early_init(); /* Program PCH init */ - pch_init(); + romstage_pch_init(); ps = pmc_get_power_state(); s3wake = pmc_fill_power_state(ps) == ACPI_S3; fsp_memory_init(s3wake); |