diff options
Diffstat (limited to 'src/soc/intel/skylake')
| -rw-r--r-- | src/soc/intel/skylake/include/soc/pm.h | 7 | ||||
| -rw-r--r-- | src/soc/intel/skylake/include/soc/pmc.h | 2 | ||||
| -rw-r--r-- | src/soc/intel/skylake/romstage/power_state.c | 12 |
3 files changed, 15 insertions, 6 deletions
diff --git a/src/soc/intel/skylake/include/soc/pm.h b/src/soc/intel/skylake/include/soc/pm.h index 2e722bf206..6b75641178 100644 --- a/src/soc/intel/skylake/include/soc/pm.h +++ b/src/soc/intel/skylake/include/soc/pm.h @@ -129,10 +129,9 @@ struct chipset_power_state { uint32_t gpe0_en[4]; uint32_t gen_pmcon_a; uint32_t gen_pmcon_b; - int prev_sleep_state; - uint16_t hsio_version; - uint16_t hsio_checksum; -}; + uint32_t gblrst_cause[0]; + uint32_t prev_sleep_state; +} __attribute__ ((packed)); /* PM1_CNT */ void enable_pm1_control(uint32_t mask); diff --git a/src/soc/intel/skylake/include/soc/pmc.h b/src/soc/intel/skylake/include/soc/pmc.h index 72c9a59e47..699e795dca 100644 --- a/src/soc/intel/skylake/include/soc/pmc.h +++ b/src/soc/intel/skylake/include/soc/pmc.h @@ -57,6 +57,8 @@ #define S5AC_GATE_SUS (1 << 14) #define PMSYNC_TPR_CFG 0xc4 #define PMSYNC_LOCK (1 << 31) +#define GBLRST_CAUSE0 0x124 +#define GBLRST_CAUSE1 0x128 /* TCO registers and fields live behind TCOBASE I/O bar in SMBus device. */ diff --git a/src/soc/intel/skylake/romstage/power_state.c b/src/soc/intel/skylake/romstage/power_state.c index 5c94e89fd7..68a11a4a4d 100644 --- a/src/soc/intel/skylake/romstage/power_state.c +++ b/src/soc/intel/skylake/romstage/power_state.c @@ -54,10 +54,10 @@ static void migrate_power_state(int is_recovery) ROMSTAGE_CBMEM_INIT_HOOK(migrate_power_state) /* Return 0, 3, or 5 to indicate the previous sleep state. */ -static int prev_sleep_state(struct chipset_power_state *ps) +static uint32_t prev_sleep_state(struct chipset_power_state *ps) { /* Default to S0. */ - int prev_sleep_state = SLEEP_STATE_S0; + uint32_t prev_sleep_state = SLEEP_STATE_S0; if (ps->pm1_sts & WAK_STS) { switch ((ps->pm1_cnt & SLP_TYP) >> SLP_TYP_SHIFT) { @@ -112,6 +112,9 @@ static void dump_power_state(struct chipset_power_state *ps) printk(BIOS_DEBUG, "GEN_PMCON: %08x %08x\n", ps->gen_pmcon_a, ps->gen_pmcon_b); + printk(BIOS_DEBUG, "GBLRST_CAUSE: %08x %08x\n", + ps->gblrst_cause[0], ps->gblrst_cause[1]); + printk(BIOS_DEBUG, "Previous Sleep State: S%d\n", ps->prev_sleep_state); } @@ -120,6 +123,7 @@ static void dump_power_state(struct chipset_power_state *ps) struct chipset_power_state *fill_power_state(void) { uint16_t tcobase; + uint8_t *pmc; struct chipset_power_state *ps = car_get_var_ptr(&power_state); tcobase = pmc_tco_regs(); @@ -141,6 +145,10 @@ struct chipset_power_state *fill_power_state(void) ps->gen_pmcon_a = pci_read_config32(PCH_DEV_PMC, GEN_PMCON_A); ps->gen_pmcon_b = pci_read_config32(PCH_DEV_PMC, GEN_PMCON_B); + pmc = pmc_mmio_regs(); + ps->gblrst_cause[0] = read32(pmc + GBLRST_CAUSE0); + ps->gblrst_cause[1] = read32(pmc + GBLRST_CAUSE1); + ps->prev_sleep_state = prev_sleep_state(ps); dump_power_state(ps); |