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-rw-r--r--src/soc/intel/skylake/chip.c4
-rw-r--r--src/soc/intel/skylake/chip.h1
2 files changed, 3 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index 7dee333a6e..a73aa8daab 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -231,7 +231,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->PchCio2Enable = config->Cio2Enable;
params->SaImguEnable = config->SaImguEnable;
- params->Heci3Enabled = config->Heci3Enabled;
+
+ dev = pcidev_path_on_root(PCH_DEVFN_CSE_3);
+ params->Heci3Enabled = dev ? dev->enabled : 0;
params->LogoPtr = config->LogoPtr;
params->LogoSize = config->LogoSize;
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index 54d006915c..3f55c18b8b 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -315,7 +315,6 @@ struct soc_intel_skylake_config {
u8 PttSwitch;
u8 HeciTimeouts;
u8 HsioMessaging;
- u8 Heci3Enabled;
/* Gfx related */
u8 IgdDvmt50PreAlloc;