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Diffstat (limited to 'src/soc/intel/tigerlake/include/soc/irq.h')
-rw-r--r--src/soc/intel/tigerlake/include/soc/irq.h69
1 files changed, 64 insertions, 5 deletions
diff --git a/src/soc/intel/tigerlake/include/soc/irq.h b/src/soc/intel/tigerlake/include/soc/irq.h
index b87467ad5b..818cd31be6 100644
--- a/src/soc/intel/tigerlake/include/soc/irq.h
+++ b/src/soc/intel/tigerlake/include/soc/irq.h
@@ -15,10 +15,69 @@
#ifndef _SOC_IRQ_H_
#define _SOC_IRQ_H_
-#if CONFIG(SOC_INTEL_TIGERLAKE)
- #include "irq_tgl.h"
-#else
- #include "irq_jsl.h"
-#endif /* CONFIG_SOC_INTEL_TIGERLAKE */
+#define GPIO_IRQ14 14
+#define GPIO_IRQ15 15
+#define PCH_IRQ10 10
+#define PCH_IRQ11 11
+
+#define LPSS_I2C0_IRQ 27
+#define LPSS_I2C1_IRQ 28
+#define LPSS_I2C2_IRQ 29
+#define LPSS_I2C3_IRQ 30
+#define LPSS_I2C4_IRQ 31
+#define LPSS_I2C5_IRQ 32
+#define LPSS_SPI0_IRQ 36
+#define LPSS_SPI1_IRQ 37
+#define LPSS_SPI2_IRQ 18
+#define LPSS_SPI3_IRQ 23
+#define LPSS_UART0_IRQ 34
+#define LPSS_UART1_IRQ 35
+#define LPSS_UART2_IRQ 33
+
+#define HDA_IRQ 16
+#define SMBUS_IRQ 16
+#define TRACEHUB_IRQ 16
+
+#define PCIE_1_IRQ 16
+#define PCIE_2_IRQ 17
+#define PCIE_3_IRQ 18
+#define PCIE_4_IRQ 19
+#define PCIE_5_IRQ 16
+#define PCIE_6_IRQ 17
+#define PCIE_7_IRQ 18
+#define PCIE_8_IRQ 19
+#define PCIE_9_IRQ 16
+#define PCIE_10_IRQ 17
+#define PCIE_11_IRQ 18
+#define PCIE_12_IRQ 19
+
+#define SATA_IRQ 16
+
+#define xHCI_IRQ 16
+#define xDCI_IRQ 17
+#define CNVI_WIFI_IRQ 16
+
+#define CNVI_BT_IRQ 18
+
+#define THC0_IRQ 16
+#define THC1_IRQ 17
+
+#define ISH_IRQ 16
+
+#define TBT_PCIe0_IRQ 16
+#define TBT_PCIe1_IRQ 17
+#define TBT_PCIe2_IRQ 18
+#define TBT_PCIe3_IRQ 19
+
+#define HECI_1_IRQ 16
+#define HECI_2_IRQ 17
+#define HECI_3_IRQ 16
+#define HECI_4_IRQ 19
+
+#define PEG_IRQ 16
+#define IGFX_IRQ 16
+#define THERMAL_IRQ 16
+#define IPU_IRQ 16
+#define GNA_IRQ 16
#endif /* _SOC_IRQ_H_ */