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Diffstat (limited to 'src/soc/intel/tigerlake/include/soc/pch.h')
-rw-r--r--src/soc/intel/tigerlake/include/soc/pch.h29
1 files changed, 29 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/include/soc/pch.h b/src/soc/intel/tigerlake/include/soc/pch.h
new file mode 100644
index 0000000000..57ddeaf97f
--- /dev/null
+++ b/src/soc/intel/tigerlake/include/soc/pch.h
@@ -0,0 +1,29 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2019 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _SOC_TIGERLAKE_PCH_H_
+#define _SOC_TIGERLAKE_PCH_H_
+
+#include <stdint.h>
+
+#define PCH_H 1
+#define PCH_LP 2
+#define PCH_UNKNOWN_SERIES 0xFF
+
+#define PCIE_CLK_NOTUSED 0xFF
+#define PCIE_CLK_LAN 0x70
+#define PCIE_CLK_FREE 0x80
+
+#endif