diff options
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/elkhartlake/include/soc/meminit.h | 17 | ||||
| -rw-r--r-- | src/soc/intel/elkhartlake/meminit.c | 3 |
2 files changed, 18 insertions, 2 deletions
diff --git a/src/soc/intel/elkhartlake/include/soc/meminit.h b/src/soc/intel/elkhartlake/include/soc/meminit.h index ea4664a150..2dcbd13253 100644 --- a/src/soc/intel/elkhartlake/include/soc/meminit.h +++ b/src/soc/intel/elkhartlake/include/soc/meminit.h @@ -88,11 +88,26 @@ struct mb_cfg { /* * Rcomp target values. These will typically be the following - * values for Elkhart Lake : { 80, 40, 40, 40, 30 } + * values for Elkhart Lake : { 60, 40, 30, 20, 30 } */ uint16_t rcomp_targets[5]; /* + * Indicates whether memory is interleaved. + * Set to 1 for an interleaved design, + * set to 0 for non-interleaved design. + */ + uint8_t dq_pins_interleaved; + + /* + * VREF_CA configuration. + * Set to 0 VREF_CA goes to both CH_A and CH_B, + * set to 1 VREF_CA goes to CH_A and VREF_DQ_A goes to CH_B, + * set to 2 VREF_CA goes to CH_A and VREF_DQ_B goes to CH_B. + */ + uint8_t vref_ca_config; + + /* * Early Command Training Enable/Disable Control * 1 = enable, 0 = disable */ diff --git a/src/soc/intel/elkhartlake/meminit.c b/src/soc/intel/elkhartlake/meminit.c index cd777ba3a0..f1f82708d8 100644 --- a/src/soc/intel/elkhartlake/meminit.c +++ b/src/soc/intel/elkhartlake/meminit.c @@ -109,6 +109,7 @@ void memcfg_init(FSP_M_CONFIG *mem_cfg, const struct mb_cfg *board_cfg, /* Early Command Training Enabled */ mem_cfg->ECT = board_cfg->ect; - + mem_cfg->DqPinsInterleaved = board_cfg->dq_pins_interleaved; + mem_cfg->CaVrefConfig = board_cfg->vref_ca_config; mem_cfg->UserBd = board_cfg->UserBd; } |