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-rw-r--r--src/soc/intel/baytrail/pcie.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/baytrail/pcie.c b/src/soc/intel/baytrail/pcie.c
index e4c0654b41..4a050fa55a 100644
--- a/src/soc/intel/baytrail/pcie.c
+++ b/src/soc/intel/baytrail/pcie.c
@@ -230,7 +230,7 @@ static void byt_pcie_enable(device_t dev)
southcluster_enable_dev(dev);
}
-static unsigned int byt_pciexp_scan_bridge(device_t dev, unsigned int max)
+static void byt_pciexp_scan_bridge(device_t dev)
{
static const struct reg_script wait_for_link_active[] = {
REG_PCI_POLL32(LCTL, (1 << 29) , (1 << 29), 50000),
@@ -240,7 +240,7 @@ static unsigned int byt_pciexp_scan_bridge(device_t dev, unsigned int max)
/* wait for Link Active with 50ms timeout */
reg_script_run_on_dev(dev, wait_for_link_active);
- return do_pci_scan_bridge(dev, max, pciexp_scan_bus);
+ do_pci_scan_bridge(dev, pciexp_scan_bus);
}
static void pcie_root_set_subsystem(device_t dev, unsigned vid, unsigned did)