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-rw-r--r--src/soc/intel/cannonlake/fsp_params.c2
-rw-r--r--src/soc/intel/icelake/fsp_params.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index dc4a2a841e..f1b8446f48 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -261,7 +261,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
/* Legacy 8254 timer support */
params->Enable8254ClockGating = !CONFIG_USE_LEGACY_8254_TIMER;
- params->Enable8254ClockGatingOnS3 = 1;
+ params->Enable8254ClockGatingOnS3 = !CONFIG_USE_LEGACY_8254_TIMER;
/* USB */
for (i = 0; i < ARRAY_SIZE(config->usb2_ports); i++) {
diff --git a/src/soc/intel/icelake/fsp_params.c b/src/soc/intel/icelake/fsp_params.c
index 7514be107d..334fac8766 100644
--- a/src/soc/intel/icelake/fsp_params.c
+++ b/src/soc/intel/icelake/fsp_params.c
@@ -140,7 +140,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
/* Legacy 8254 timer support */
params->Enable8254ClockGating = !CONFIG_USE_LEGACY_8254_TIMER;
- params->Enable8254ClockGatingOnS3 = 1;
+ params->Enable8254ClockGatingOnS3 = !CONFIG_USE_LEGACY_8254_TIMER;
/* S0ix */
params->PchPmSlpS0Enable = config->s0ix_enable;