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-rw-r--r--src/soc/intel/fsp_baytrail/baytrail/romstage.h4
-rw-r--r--src/soc/intel/fsp_baytrail/romstage/romstage.c2
2 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/fsp_baytrail/baytrail/romstage.h b/src/soc/intel/fsp_baytrail/baytrail/romstage.h
index 1ceb4cf7cb..a800600626 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/romstage.h
+++ b/src/soc/intel/fsp_baytrail/baytrail/romstage.h
@@ -29,9 +29,9 @@ void report_platform_info(void);
#include <stdint.h>
#include <arch/cpu.h>
+#include <drivers/intel/fsp/fsp_util.h>
-#include <fsptypes.h>
-
+void main(FSP_INFO_HEADER *fsp_info_header);
void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr);
uint32_t chipset_prev_sleep_state(uint32_t clear);
diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c
index 6dff7434cf..259ecdc679 100644
--- a/src/soc/intel/fsp_baytrail/romstage/romstage.c
+++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c
@@ -152,7 +152,7 @@ static void baytrail_rtc_init(void)
}
/* Entry from cache-as-ram.inc. */
-void * asmlinkage main(FSP_INFO_HEADER *fsp_info_header)
+void main(FSP_INFO_HEADER *fsp_info_header)
{
const unsigned long func_dis = PMC_BASE_ADDRESS + FUNC_DIS;
const unsigned long func_dis2 = PMC_BASE_ADDRESS + FUNC_DIS2;