summaryrefslogtreecommitdiff
path: root/src/soc/intel
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/alderlake/acpi.c34
1 files changed, 17 insertions, 17 deletions
diff --git a/src/soc/intel/alderlake/acpi.c b/src/soc/intel/alderlake/acpi.c
index db005e8bcf..664c40ba3d 100644
--- a/src/soc/intel/alderlake/acpi.c
+++ b/src/soc/intel/alderlake/acpi.c
@@ -198,6 +198,23 @@ static unsigned long soc_fill_dmar(unsigned long current)
acpi_dmar_drhd_fixup(tmp, current);
}
+ /* TCSS Thunderbolt root ports */
+ for (unsigned int i = 0; i < MAX_TBT_PCIE_PORT; i++) {
+ const struct device *const tbt_dev = pcidev_path_on_root(SA_DEVFN_TBT(i));
+ if (is_dev_enabled(tbt_dev)) {
+ const uint64_t tbtbar = MCHBAR64(TBTxBAR(i)) & VTBAR_MASK;
+ const bool tbten = MCHBAR32(TBTxBAR(i)) & VTBAR_ENABLED;
+ if (tbtbar && tbten) {
+ const unsigned long tmp = current;
+
+ current += acpi_create_dmar_drhd(current, 0, 0, tbtbar);
+ current += acpi_create_dmar_ds_pci_br(current, 0, 7, i);
+
+ acpi_dmar_drhd_fixup(tmp, current);
+ }
+ }
+ }
+
const uint64_t vtvc0bar = MCHBAR64(VTVC0BAR) & VTBAR_MASK;
const bool vtvc0en = MCHBAR32(VTVC0BAR) & VTBAR_ENABLED;
@@ -216,23 +233,6 @@ static unsigned long soc_fill_dmar(unsigned long current)
acpi_dmar_drhd_fixup(tmp, current);
}
- /* TCSS Thunderbolt root ports */
- for (unsigned int i = 0; i < MAX_TBT_PCIE_PORT; i++) {
- const struct device *const tbt_dev = pcidev_path_on_root(SA_DEVFN_TBT(i));
- if (is_dev_enabled(tbt_dev)) {
- const uint64_t tbtbar = MCHBAR64(TBTxBAR(i)) & VTBAR_MASK;
- const bool tbten = MCHBAR32(TBTxBAR(i)) & VTBAR_ENABLED;
- if (tbtbar && tbten) {
- const unsigned long tmp = current;
-
- current += acpi_create_dmar_drhd(current, 0, 0, tbtbar);
- current += acpi_create_dmar_ds_pci_br(current, 0, 7, i);
-
- acpi_dmar_drhd_fixup(tmp, current);
- }
- }
- }
-
/* Add RMRR entry */
if (is_dev_enabled(igfx_dev)) {
const unsigned long tmp = current;