diff options
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/skylake/chip.c | 30 | ||||
-rw-r--r-- | src/soc/intel/skylake/chip.h | 8 | ||||
-rw-r--r-- | src/soc/intel/skylake/include/soc/serialio.h | 3 | ||||
-rw-r--r-- | src/soc/intel/skylake/romstage/romstage.c | 7 |
4 files changed, 36 insertions, 12 deletions
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index fd959b2807..25235c910c 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -80,11 +80,28 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params) memcpy(params->PortUsb30Enable, config->PortUsb30Enable, sizeof(params->PortUsb30Enable)); + memcpy(params->Usb2AfePetxiset, config->Usb2AfePetxiset, + sizeof(params->Usb2AfePetxiset)); + memcpy(params->Usb2AfeTxiset, config->Usb2AfeTxiset, + sizeof(params->Usb2AfeTxiset)); + memcpy(params->Usb2AfePredeemp, config->Usb2AfePredeemp, + sizeof(params->Usb2AfePredeemp)); + memcpy(params->Usb2AfePehalfbit, config->Usb2AfePehalfbit, + sizeof(params->Usb2AfePehalfbit)); + + memcpy(params->Usb3HsioTxDeEmphEnable, config->Usb3HsioTxDeEmphEnable, + sizeof(params->Usb3HsioTxDeEmphEnable)); + memcpy(params->Usb3HsioTxDeEmph, config->Usb3HsioTxDeEmph, + sizeof(params->Usb3HsioTxDeEmph)); + memcpy(params->Usb3HsioTxDownscaleAmpEnable, config->Usb3HsioTxDownscaleAmpEnable, + sizeof(params->Usb3HsioTxDownscaleAmpEnable)); + memcpy(params->Usb3HsioTxDownscaleAmp, config->Usb3HsioTxDownscaleAmp, + sizeof(params->Usb3HsioTxDownscaleAmp)); + params->SataSalpSupport = config->SataSalpSupport; params->SataPortsEnable[0] = config->SataPortsEnable[0]; params->SsicPortEnable = config->SsicPortEnable; params->SmbusEnable = config->SmbusEnable; - params->Cio2Enable = config->Cio2Enable; params->ScsEmmcEnabled = config->ScsEmmcEnabled; params->ScsEmmcHs400Enabled = config->ScsEmmcHs400Enabled; params->ScsSdCardEnabled = config->ScsSdCardEnabled; @@ -95,6 +112,8 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params) params->XdciEnable = config->XdciEnable; params->Device4Enable = config->Device4Enable; params->RtcLock = config->RtcLock; + params->EnableSata = config->EnableSata; + params->SataMode = config->SataMode; /* Show SPI controller if enabled in devicetree.cb */ dev = dev_find_slot(0, PCH_DEVFN_SPI); @@ -124,9 +143,6 @@ void soc_display_silicon_init_params(const SILICON_INIT_UPD *original, soc_display_upd_value("TurboMode", 1, (uint32_t)original->TurboMode, (uint32_t)params->TurboMode); - soc_display_upd_value("GpioTablePtr", 4, - (uint32_t)original->GpioTablePtr, - (uint32_t)params->GpioTablePtr); soc_display_upd_value("Device4Enable", 1, original->Device4Enable, params->Device4Enable); @@ -250,8 +266,6 @@ void soc_display_silicon_init_params(const SILICON_INIT_UPD *original, original->SerialIoDevMode[9], params->SerialIoDevMode[9]); soc_display_upd_value("SerialIoDevMode[10]", 1, original->SerialIoDevMode[10], params->SerialIoDevMode[10]); - soc_display_upd_value("Cio2Enable", 1, original->Cio2Enable, - params->Cio2Enable); soc_display_upd_value("ScsEmmcEnabled", 1, original->ScsEmmcEnabled, params->ScsEmmcEnabled); soc_display_upd_value("ScsEmmcHs400Enabled", 1, @@ -268,6 +282,10 @@ void soc_display_silicon_init_params(const SILICON_INIT_UPD *original, params->Heci3Enabled); soc_display_upd_value("RtcLock", 1, original->RtcLock, params->RtcLock); + soc_display_upd_value("EnableSata", 1, original->EnableSata, + params->EnableSata); + soc_display_upd_value("SataMode", 1, original->SataMode, + params->SataMode); } static void pci_set_subsystem(device_t dev, unsigned vendor, unsigned device) diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h index 95f9502f13..dd5306e078 100644 --- a/src/soc/intel/skylake/chip.h +++ b/src/soc/intel/skylake/chip.h @@ -166,6 +166,14 @@ struct soc_intel_skylake_config { u8 PortUsb30Enable[10]; u8 XdciEnable; u8 SsicPortEnable; + u8 Usb2AfePetxiset[16]; + u8 Usb2AfeTxiset[16]; + u8 Usb2AfePredeemp[16]; + u8 Usb2AfePehalfbit[16]; + u8 Usb3HsioTxDeEmphEnable[10]; + u8 Usb3HsioTxDeEmph[10]; + u8 Usb3HsioTxDownscaleAmpEnable[10]; + u8 Usb3HsioTxDownscaleAmp[10]; /* SMBus */ u8 SmbusEnable; diff --git a/src/soc/intel/skylake/include/soc/serialio.h b/src/soc/intel/skylake/include/soc/serialio.h index 0bc07c30d7..9d85c45715 100644 --- a/src/soc/intel/skylake/include/soc/serialio.h +++ b/src/soc/intel/skylake/include/soc/serialio.h @@ -33,7 +33,8 @@ typedef enum { PchSerialIoAcpi, PchSerialIoPci, PchSerialIoAcpiHidden, - PchSerialIoLegacyUart + PchSerialIoLegacyUart, + PchSerialIoSkipInit } PCH_SERIAL_IO_MODE; typedef enum { diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c index b21eb8a304..3c60b163fa 100644 --- a/src/soc/intel/skylake/romstage/romstage.c +++ b/src/soc/intel/skylake/romstage/romstage.c @@ -101,11 +101,10 @@ void soc_memory_init_params(struct romstage_params *params, upd->IedSize = CONFIG_IED_REGION_SIZE; upd->ProbelessTrace = config->ProbelessTrace; upd->EnableLan = config->EnableLan; - upd->EnableSata = config->EnableSata; - upd->SataMode = config->SataMode; upd->EnableTraceHub = config->EnableTraceHub; upd->SaGv = config->SaGv; upd->RMT = config->Rmt; + upd->Cio2Enable = config->Cio2Enable; } void soc_display_memory_init_params(const MEMORY_INIT_UPD *old, @@ -233,9 +232,6 @@ void soc_display_memory_init_params(const MEMORY_INIT_UPD *old, soc_display_upd_value("TsegSize", 4, old->TsegSize, new->TsegSize); soc_display_upd_value("MmioSize", 2, old->MmioSize, new->MmioSize); soc_display_upd_value("EnableLan", 1, old->EnableLan, new->EnableLan); - soc_display_upd_value("EnableSata", 1, old->EnableSata, - new->EnableSata); - soc_display_upd_value("SataMode", 1, old->SataMode, new->SataMode); soc_display_upd_value("EnableTraceHub", 1, old->EnableTraceHub, new->EnableTraceHub); soc_display_upd_value("PcieRpEnable[0]", 1, old->PcieRpEnable[0], @@ -406,6 +402,7 @@ void soc_display_memory_init_params(const MEMORY_INIT_UPD *old, new->ApertureSize); soc_display_upd_value("SaGv", 1, old->SaGv, new->SaGv); soc_display_upd_value("RMT", 1, old->RMT, new->RMT); + soc_display_upd_value("Cio2Enable", 1, old->Cio2Enable, new->Cio2Enable); } /* SOC initialization after RAM is enabled. */ |