diff options
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/apollolake/Makefile.inc | 4 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/Kconfig | 2 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/Makefile.inc | 22 | ||||
| -rw-r--r-- | src/soc/intel/fsp_broadwell_de/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/soc/intel/skylake/Makefile.inc | 8 |
5 files changed, 27 insertions, 11 deletions
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 1fd16038a7..4fc16d5891 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -177,10 +177,10 @@ $(RT5682_RENDER_CAPTURE)-type := raw ifeq ($(CONFIG_SOC_INTEL_GLK),y) # Gemini Lake B0 (706a1) only atm. -cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_706ax/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-7a-*) else # Apollo Lake 506c2, B0 (506c9) and E0 (506ca) only atm. -cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_506cx/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-5c-*) endif endif # if CONFIG_SOC_INTEL_APOLLOLAKE diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 679efce396..37e42f30e2 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -16,6 +16,7 @@ config SOC_INTEL_CANNONLAKE_ALTERNATE_HEADERS config SOC_INTEL_CANNONLAKE bool select SOC_INTEL_CANNONLAKE_BASE + select MICROCODE_BLOB_NOT_IN_BLOB_REPO help Intel Cannonlake support @@ -34,6 +35,7 @@ config SOC_INTEL_WHISKEYLAKE config SOC_INTEL_COMETLAKE bool select SOC_INTEL_CANNONLAKE_BASE + select MICROCODE_BLOB_UNDISCLOSED help Intel Cometlake support diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index 5017410234..8a4a8b71f2 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -90,10 +90,24 @@ smm-y += gpio.c verstage-y += gpio.c endif -# Coffeelake U43e D0 -cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_806ex/microcode.bin -# Coffeelake H/S/E3 B0 U0 -cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_906ex/microcode.bin +ifeq ($(CONFIG_SOC_INTEL_CANNONLAKE),y) +# Not yet in intel-microcode repo +#cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-66-*) +else ifeq ($(CONFIG_SOC_INTEL_COFFEELAKE),y) +ifeq ($(CONFIG_SOC_INTEL_CANNONLAKE_PCH_H),y) +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0a +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0b +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0c +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0d +else +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-0a +endif +else ifeq ($(CONFIG_SOC_INTEL_WHISKEYLAKE),y) +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-0b +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-0c +else ifeq ($(CONFIG_SOC_INTEL_COMETLAKE),y) +# TODO +endif CPPFLAGS_common += -I$(src)/soc/intel/cannonlake CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include diff --git a/src/soc/intel/fsp_broadwell_de/Makefile.inc b/src/soc/intel/fsp_broadwell_de/Makefile.inc index 0a23170d0c..e8a31890ba 100644 --- a/src/soc/intel/fsp_broadwell_de/Makefile.inc +++ b/src/soc/intel/fsp_broadwell_de/Makefile.inc @@ -39,6 +39,6 @@ CPPFLAGS_common += -I$(src)/soc/intel/fsp_broadwell_de/include CPPFLAGS_common += -I$(src)/soc/intel/fsp_broadwell_de/fsp CPPFLAGS_common += -I$(src)/soc/intel/fsp_broadwell_de/ -cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_5066x/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-56-*) endif # ifeq ($(CONFIG_SOC_INTEL_FSP_BROADWELL_DE),y) diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index 985acdf135..25dce05226 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -83,14 +83,14 @@ postcar-y += uart.c ifeq ($(CONFIG_SKYLAKE_SOC_PCH_H),y) # Skylake H Q0 -cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_506ex/microcode.bin +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-5e-03 # Kabylake HB0 -cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_906ex/microcode.bin +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-09 else # Skylake D0 -cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_406ex/microcode.bin +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-4e-03 # Kabylake H0, Y0 -cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_806ex/microcode.bin +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-09 endif # Missing for Skylake C0 (0x406e2), Kabylake G0 (0x406e8), Kabylake HA0 (0x506e8) # since those are probably pre-release samples. |