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-rw-r--r--src/soc/intel/skylake/chip.c4
-rw-r--r--src/soc/intel/skylake/chip.h11
2 files changed, 13 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index b5bcc65ebe..dbf7785888 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -410,6 +410,7 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params)
params->TcoIrqSelect = config->TcoIrqSelect;
/* TCO Irq enable/disable */
params->TcoIrqEnable = config->TcoIrqEnable;
+ params->SendVrMbxCmd = config->SendVrMbxCmd;
}
void soc_display_silicon_init_params(const SILICON_INIT_UPD *original,
@@ -1011,6 +1012,9 @@ void soc_display_silicon_init_params(const SILICON_INIT_UPD *original,
fsp_display_upd_value("SerialIoI2cVoltage[5]", 1,
original->SerialIoI2cVoltage[5],
params->SerialIoI2cVoltage[5]);
+ fsp_display_upd_value("SendVrMbxCmd", 1,
+ original->SendVrMbxCmd,
+ params->SendVrMbxCmd);
}
static void pci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index 6203916088..e18b45a68a 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -312,8 +312,8 @@ struct soc_intel_skylake_config {
*/
u8 SerialIrqConfigStartFramePulse;
u8 FspSkipMpInit;
-
- /* VrConfig Settings for 5 domains
+ /*
+ * VrConfig Settings for 5 domains
* 0 = System Agent, 1 = IA Core, 2 = Ring,
* 3 = GT unsliced, 4 = GT sliced
*/
@@ -328,6 +328,13 @@ struct soc_intel_skylake_config {
u8 PmTimerDisabled;
/* Intel Speed Shift Technology */
u8 speed_shift_enable;
+ /*
+ * Enable VR specific mailbox command
+ * When set, an extra VR mailbox command specifically
+ * for the MPS IMPV8 VR will be sent.
+ * 0 - Don't Send, 1 - Send
+ */
+ u8 SendVrMbxCmd;
};
typedef struct soc_intel_skylake_config config_t;