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-rw-r--r--src/soc/intel/baytrail/romstage/romstage.c8
-rw-r--r--src/soc/intel/broadwell/include/soc/romstage.h2
-rw-r--r--src/soc/intel/broadwell/romstage/romstage.c2
-rw-r--r--src/soc/intel/broadwell/romstage/stack.c4
4 files changed, 8 insertions, 8 deletions
diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c
index 0e8710a903..980064c2b0 100644
--- a/src/soc/intel/baytrail/romstage/romstage.c
+++ b/src/soc/intel/baytrail/romstage/romstage.c
@@ -50,7 +50,7 @@
* Because we can't use global variables the stack is used for allocations --
* thus the need to call back and forth. */
-static void *setup_stack_and_mttrs(void);
+static void *setup_stack_and_mtrrs(void);
static void program_base_addresses(void)
{
@@ -131,7 +131,7 @@ void * asmlinkage romstage_main(unsigned long bist,
/* Call into mainboard. */
mainboard_romstage_entry(&rp);
- return setup_stack_and_mttrs();
+ return setup_stack_and_mtrrs();
}
static struct chipset_power_state power_state CAR_GLOBAL;
@@ -248,9 +248,9 @@ static inline uint32_t *stack_push(u32 *stack, u32 value)
return stack;
}
-/* setup_stack_and_mttrs() determines the stack to use after
+/* setup_stack_and_mtrrs() determines the stack to use after
* cache-as-ram is torn down as well as the MTRR settings to use. */
-static void *setup_stack_and_mttrs(void)
+static void *setup_stack_and_mtrrs(void)
{
int num_mtrrs;
uint32_t *slot;
diff --git a/src/soc/intel/broadwell/include/soc/romstage.h b/src/soc/intel/broadwell/include/soc/romstage.h
index eb4e097f00..e52004bfd5 100644
--- a/src/soc/intel/broadwell/include/soc/romstage.h
+++ b/src/soc/intel/broadwell/include/soc/romstage.h
@@ -33,7 +33,7 @@ asmlinkage void *romstage_main(unsigned long bist, uint32_t tsc_lo,
uint32_t tsc_high);
asmlinkage void romstage_after_car(void);
void raminit(struct pei_data *pei_data);
-void *setup_stack_and_mttrs(void);
+void *setup_stack_and_mtrrs(void);
struct chipset_power_state;
struct chipset_power_state *fill_power_state(void);
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c
index 025855b47b..8a3f2911a0 100644
--- a/src/soc/intel/broadwell/romstage/romstage.c
+++ b/src/soc/intel/broadwell/romstage/romstage.c
@@ -80,7 +80,7 @@ asmlinkage void *romstage_main(unsigned long bist,
/* Call into mainboard. */
mainboard_romstage_entry(&rp);
- return setup_stack_and_mttrs();
+ return setup_stack_and_mtrrs();
}
/* Entry from the mainboard. */
diff --git a/src/soc/intel/broadwell/romstage/stack.c b/src/soc/intel/broadwell/romstage/stack.c
index a6a4b4bfc9..aa36e29ccf 100644
--- a/src/soc/intel/broadwell/romstage/stack.c
+++ b/src/soc/intel/broadwell/romstage/stack.c
@@ -30,9 +30,9 @@ static inline uint32_t *stack_push(u32 *stack, u32 value)
return stack;
}
-/* setup_stack_and_mttrs() determines the stack to use after
+/* setup_stack_and_mtrrs() determines the stack to use after
* cache-as-ram is torn down as well as the MTRR settings to use. */
-void *setup_stack_and_mttrs(void)
+void *setup_stack_and_mtrrs(void)
{
int num_mtrrs;
uint32_t *slot;