diff options
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/baytrail/Kconfig | 1 | ||||
-rw-r--r-- | src/soc/intel/braswell/Kconfig | 1 | ||||
-rw-r--r-- | src/soc/intel/broadwell/Kconfig | 3 | ||||
-rw-r--r-- | src/soc/intel/fsp_baytrail/Kconfig | 1 |
4 files changed, 0 insertions, 6 deletions
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 032a60e35e..2764efb015 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -13,7 +13,6 @@ config CPU_SPECIFIC_OPTIONS select ARCH_RAMSTAGE_X86_32 select BACKUP_DEFAULT_SMM_REGION select CACHE_MRC_SETTINGS - select CAR_MIGRATION select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_SMI_HANDLER diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index 20abff5f72..d4200c77c6 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -13,7 +13,6 @@ config CPU_SPECIFIC_OPTIONS select ARCH_RAMSTAGE_X86_32 select BACKUP_DEFAULT_SMM_REGION select CACHE_MRC_SETTINGS - select CAR_MIGRATION select COLLECT_TIMESTAMPS select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 3c8b64bb10..6ad9113018 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -11,15 +11,12 @@ config CPU_SPECIFIC_OPTIONS select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 - select ALT_CBFS_LOAD_PAYLOAD select ALWAYS_LOAD_OPROM select BACKUP_DEFAULT_SMM_REGION select CACHE_MRC_BIN select CACHE_MRC_SETTINGS select MRC_SETTINGS_PROTECT select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM - select CACHE_ROM - select CAR_MIGRATION select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_MONOTONIC_TIMER diff --git a/src/soc/intel/fsp_baytrail/Kconfig b/src/soc/intel/fsp_baytrail/Kconfig index 765c57fb23..95d45da657 100644 --- a/src/soc/intel/fsp_baytrail/Kconfig +++ b/src/soc/intel/fsp_baytrail/Kconfig @@ -47,7 +47,6 @@ config CPU_SPECIFIC_OPTIONS select TSC_SYNC_MFENCE select UDELAY_TSC select SUPPORT_CPU_UCODE_IN_CBFS - select ROMSTAGE_RTC_INIT config SOC_INTEL_FSP_BAYTRAIL_MD bool |