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-rw-r--r--src/soc/intel/tigerlake/acpi/gpio.asl96
-rw-r--r--src/soc/intel/tigerlake/gpio.c35
-rw-r--r--src/soc/intel/tigerlake/include/soc/gpio.h7
3 files changed, 49 insertions, 89 deletions
diff --git a/src/soc/intel/tigerlake/acpi/gpio.asl b/src/soc/intel/tigerlake/acpi/gpio.asl
index 9b8a175659..d1e4955e4a 100644
--- a/src/soc/intel/tigerlake/acpi/gpio.asl
+++ b/src/soc/intel/tigerlake/acpi/gpio.asl
@@ -1,103 +1,57 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
+#include <intelblocks/gpio.h>
#include <soc/gpio_defs.h>
+#include <soc/intel/common/acpi/gpio.asl>
#include <soc/irq.h>
#include <soc/pcr_ids.h>
-#include <intelblocks/gpio.h>
-#include <soc/intel/common/acpi/gpio.asl>
#include "gpio_op.asl"
-Device (GCM0)
+Device (GPIO)
{
- Name (_HID, CROS_GPIO_NAME)
+ Name (_HID, "INT34C5")
Name (_UID, 0)
- Name (_DDN, "GPIO Controller Community 0")
+ Name (_DDN, "GPIO Controller")
Name (RBUF, ResourceTemplate()
{
- Memory32Fixed (ReadWrite, 0, GPIO_BASE_SIZE, COM0)
+ Memory32Fixed (ReadWrite, 0, 0, COM0)
+ Memory32Fixed (ReadWrite, 0, 0, COM1)
+ Memory32Fixed (ReadWrite, 0, 0, COM4)
+ Memory32Fixed (ReadWrite, 0, 0, COM5)
Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ)
{ GPIO_IRQ14 }
})
Method (_CRS, 0, NotSerialized)
{
+ /* GPIO Community 0 */
CreateDWordField (^RBUF, ^COM0._BAS, BAS0)
+ CreateDWordField (^RBUF, ^COM0._LEN, LEN0)
BAS0 = ^^PCRB (PID_GPIOCOM0)
- Return (^RBUF)
- }
- Method (_STA)
- {
- Return (0xF)
- }
-}
+ LEN0 = GPIO_BASE_SIZE
-Device (GCM1)
-{
- Name (_HID, CROS_GPIO_NAME)
- Name (_UID, 1)
- Name (_DDN, "GPIO Controller Community 1")
-
- Name (RBUF, ResourceTemplate()
- {
- Memory32Fixed (ReadWrite, 0, GPIO_BASE_SIZE, COM1)
- Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ)
- { GPIO_IRQ14 }
- })
- Method (_CRS, 0, NotSerialized)
- {
+ /* GPIO Community 1 */
CreateDWordField (^RBUF, ^COM1._BAS, BAS1)
+ CreateDWordField (^RBUF, ^COM1._LEN, LEN1)
BAS1 = ^^PCRB (PID_GPIOCOM1)
- Return (^RBUF)
- }
- Method (_STA)
- {
- Return (0xF)
- }
-}
+ LEN1 = GPIO_BASE_SIZE
-Device (GCM4)
-{
- Name (_HID, CROS_GPIO_NAME)
- Name (_UID, 4)
- Name (_DDN, "GPIO Controller Community 4")
-
- Name (RBUF, ResourceTemplate()
- {
- Memory32Fixed (ReadWrite, 0, GPIO_BASE_SIZE, COM4)
- Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ)
- { GPIO_IRQ14 }
- })
- Method (_CRS, 0, NotSerialized)
- {
+ /* GPIO Community 4 */
CreateDWordField (^RBUF, ^COM4._BAS, BAS4)
+ CreateDWordField (^RBUF, ^COM4._LEN, LEN4)
BAS4 = ^^PCRB (PID_GPIOCOM4)
- Return (^RBUF)
- }
- Method (_STA)
- {
- Return (0xF)
- }
-}
-
-Device (GCM5)
-{
- Name (_HID, CROS_GPIO_NAME)
- Name (_UID, 5)
- Name (_DDN, "GPIO Controller Community 5")
+ LEN4 = GPIO_BASE_SIZE
- Name (RBUF, ResourceTemplate()
- {
- Memory32Fixed (ReadWrite, 0, GPIO_BASE_SIZE, COM5)
- Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ)
- { GPIO_IRQ14 }
- })
- Method (_CRS, 0, NotSerialized)
- {
+ /* GPIO Community 5 */
CreateDWordField (^RBUF, ^COM5._BAS, BAS5)
+ CreateDWordField (^RBUF, ^COM5._LEN, LEN5)
BAS5 = ^^PCRB (PID_GPIOCOM5)
- Return (^RBUF)
+ LEN5 = GPIO_BASE_SIZE
+
+ Return (RBUF)
}
- Method (_STA)
+
+ Method (_STA, 0, NotSerialized)
{
Return (0xF)
}
diff --git a/src/soc/intel/tigerlake/gpio.c b/src/soc/intel/tigerlake/gpio.c
index cfdd0ac465..f96262a74e 100644
--- a/src/soc/intel/tigerlake/gpio.c
+++ b/src/soc/intel/tigerlake/gpio.c
@@ -37,21 +37,30 @@ static const struct reset_mapping rst_map_com2[] = {
};
/*
- * This layout matches the Linux kernel pinctrl map for TGL-LP at:
+ * The GPIO pinctrl driver for Tiger Lake on Linux expects 32 GPIOs per pad
+ * group, regardless of whether or not there is a physical pad for each
+ * exposed GPIO number.
+ *
+ * This results in the OS having a sparse GPIO map, and devices that need
+ * to export an ACPI GPIO must use the OS expected number.
+ *
+ * Not all pins are usable as GPIO and those groups do not have a pad base.
+ *
+ * This layout matches the Linux kernel pinctrl map for TGL at:
* linux/drivers/pinctrl/intel/pinctrl-tigerlake.c
*/
static const struct pad_group tgl_community0_groups[] = {
- INTEL_GPP(GPP_B0, GPP_B0, GPP_B25), /* GPP_B */
- INTEL_GPP(GPP_B0, GPP_T0, GPP_T15), /* GPP_T */
- INTEL_GPP(GPP_B0, GPP_A0, GPP_A24), /* GPP_A */
+ INTEL_GPP_BASE(GPP_B0, GPP_B0, GPP_B25, 0), /* GPP_B */
+ INTEL_GPP_BASE(GPP_B0, GPP_T0, GPP_T15, 32), /* GPP_T */
+ INTEL_GPP_BASE(GPP_B0, GPP_A0, GPP_A24, 64), /* GPP_A */
};
static const struct pad_group tgl_community1_groups[] = {
- INTEL_GPP(GPP_S0, GPP_S0, GPP_S7), /* GPP_S */
- INTEL_GPP(GPP_S0, GPP_H0, GPP_H23), /* GPP_H */
- INTEL_GPP(GPP_S0, GPP_D0, GPP_GSPI2_CLK_LOOPBK), /* GPP_D */
- INTEL_GPP(GPP_S0, GPP_U0, GPP_GSPI6_CLK_LOOPBK), /* GPP_U */
- INTEL_GPP(GPP_S0, CNV_BTEN, vI2S2_RXD), /* GPP_VGPIO */
+ INTEL_GPP_BASE(GPP_S0, GPP_S0, GPP_S7, 96), /* GPP_S */
+ INTEL_GPP_BASE(GPP_S0, GPP_H0, GPP_H23, 128), /* GPP_H */
+ INTEL_GPP_BASE(GPP_S0, GPP_D0, GPP_GSPI2_CLK_LOOPBK, 160), /* GPP_D */
+ INTEL_GPP_BASE(GPP_S0, GPP_U0, GPP_GSPI6_CLK_LOOPBK, 192), /* GPP_U */
+ INTEL_GPP_BASE(GPP_S0, CNV_BTEN, vI2S2_RXD, 224), /* GPP_VGPIO */
};
/* This community is not visible to the OS */
@@ -60,15 +69,15 @@ static const struct pad_group tgl_community2_groups[] = {
};
static const struct pad_group tgl_community4_groups[] = {
- INTEL_GPP(GPP_C0, GPP_C0, GPP_C23), /* GPP_C */
- INTEL_GPP(GPP_C0, GPP_F0, GPP_F_CLK_LOOPBK), /* GPP_F */
+ INTEL_GPP_BASE(GPP_C0, GPP_C0, GPP_C23, 256), /* GPP_C */
+ INTEL_GPP_BASE(GPP_C0, GPP_F0, GPP_F_CLK_LOOPBK, 288), /* GPP_F */
INTEL_GPP(GPP_C0, GPP_L_BKLTEN, GPP_MLK_RSTB), /* GPP_HVCMOS */
- INTEL_GPP(GPP_C0, GPP_E0, GPP_E_CLK_LOOPBK), /* GPP_E */
+ INTEL_GPP_BASE(GPP_C0, GPP_E0, GPP_E_CLK_LOOPBK, 320), /* GPP_E */
INTEL_GPP(GPP_C0, GPP_JTAG_TDO, GPP_DBG_PMODE), /* GPP_JTAG */
};
static const struct pad_group tgl_community5_groups[] = {
- INTEL_GPP(GPP_R0, GPP_R0, GPP_R7), /* GPP_R */
+ INTEL_GPP_BASE(GPP_R0, GPP_R0, GPP_R7, 352), /* GPP_R */
INTEL_GPP(GPP_R0, GPP_SPI_IO_2, GPP_CLK_LOOPBK), /* GPP_SPI */
};
diff --git a/src/soc/intel/tigerlake/include/soc/gpio.h b/src/soc/intel/tigerlake/include/soc/gpio.h
index ccf6663865..0ac0033eff 100644
--- a/src/soc/intel/tigerlake/include/soc/gpio.h
+++ b/src/soc/intel/tigerlake/include/soc/gpio.h
@@ -7,10 +7,7 @@
#include <soc/gpio_defs.h>
#include <intelblocks/gpio.h>
-#define CROS_GPIO_NAME "INT34C5"
-#define CROS_GPIO_COMM0_NAME "INT34C5:00"
-#define CROS_GPIO_COMM1_NAME "INT34C5:01"
-#define CROS_GPIO_COMM4_NAME "INT34C5:02"
-#define CROS_GPIO_COMM5_NAME "INT34C5:03"
+
+#define CROS_GPIO_DEVICE_NAME "INT34C5:00"
#endif
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-08 00:16:01 +0000