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-rw-r--r--src/soc/lowrisc/lowrisc/Kconfig14
-rw-r--r--src/soc/lowrisc/lowrisc/Makefile.inc6
-rw-r--r--src/soc/lowrisc/lowrisc/cbmem.c23
3 files changed, 43 insertions, 0 deletions
diff --git a/src/soc/lowrisc/lowrisc/Kconfig b/src/soc/lowrisc/lowrisc/Kconfig
new file mode 100644
index 0000000000..528e7444f7
--- /dev/null
+++ b/src/soc/lowrisc/lowrisc/Kconfig
@@ -0,0 +1,14 @@
+config SOC_LOWRISC_LOWRISC
+ select ARCH_RISCV
+ select ARCH_BOOTBLOCK_RISCV
+ select ARCH_VERSTAGE_RISCV
+ select ARCH_ROMSTAGE_RISCV
+ select ARCH_RAMSTAGE_RISCV
+ select BOOTBLOCK_CONSOLE
+ select DRIVERS_UART_8250MEM_32
+ bool
+ default n
+
+if SOC_LOWRISC_LOWRISC
+
+endif
diff --git a/src/soc/lowrisc/lowrisc/Makefile.inc b/src/soc/lowrisc/lowrisc/Makefile.inc
new file mode 100644
index 0000000000..343c909377
--- /dev/null
+++ b/src/soc/lowrisc/lowrisc/Makefile.inc
@@ -0,0 +1,6 @@
+ifeq ($(CONFIG_SOC_LOWRISC_LOWRISC),y)
+
+romstage-y += cbmem.c
+ramstage-y += cbmem.c
+
+endif
diff --git a/src/soc/lowrisc/lowrisc/cbmem.c b/src/soc/lowrisc/lowrisc/cbmem.c
new file mode 100644
index 0000000000..ea7ad7027c
--- /dev/null
+++ b/src/soc/lowrisc/lowrisc/cbmem.c
@@ -0,0 +1,23 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <console/console.h>
+#include <cbmem.h>
+
+void *cbmem_top(void)
+{
+ // TODO: find out how the lowrisc SOC decides to provide
+ // this information, when they know.
+ printk(BIOS_SPEW, "Returning hard-coded 128M; fix me\n");
+ return (void *)((uintptr_t)(2ULL*GiB+128*MiB));
+}