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Diffstat (limited to 'src/soc/mediatek/common/timer.c')
-rw-r--r--src/soc/mediatek/common/timer.c27
1 files changed, 20 insertions, 7 deletions
diff --git a/src/soc/mediatek/common/timer.c b/src/soc/mediatek/common/timer.c
index 0762c2b4b4..c8af2be113 100644
--- a/src/soc/mediatek/common/timer.c
+++ b/src/soc/mediatek/common/timer.c
@@ -25,21 +25,34 @@ static struct mtk_gpt_regs *const mtk_gpt = (void *)GPT_BASE;
__weak void timer_prepare(void) { /* do nothing */ }
+static uint64_t timer_raw_value(void)
+{
+ /*
+ * According to "General-Purpose Timer (GPT).pdf", The read operation of
+ * gpt6_cnt_l will make gpt6_cnt_h fixed until the next read operation
+ * of gpt6_cnt_l. Therefore, we must read gpt6_cnt_l before gpt6_cnt_h.
+ */
+ uint32_t low = read32(&mtk_gpt->gpt6_cnt_l);
+ uint32_t high = read32(&mtk_gpt->gpt6_cnt_h);
+
+ return low | (uint64_t)high << 32;
+}
+
void timer_monotonic_get(struct mono_time *mt)
{
- mono_time_set_usecs(mt, read32(&mtk_gpt->gpt4_cnt) / GPT4_MHZ);
+ mono_time_set_usecs(mt, timer_raw_value() / GPT_MHZ);
}
void init_timer(void)
{
timer_prepare();
- /* Disable GPT4 and clear the counter */
- clrbits_le32(&mtk_gpt->gpt4_con, GPT_CON_EN);
- setbits_le32(&mtk_gpt->gpt4_con, GPT_CON_CLR);
+ /* Disable timer and clear the counter */
+ clrbits_le32(&mtk_gpt->gpt6_con, GPT_CON_EN);
+ setbits_le32(&mtk_gpt->gpt6_con, GPT_CON_CLR);
/* Set clock source to system clock and set clock divider to 1 */
- write32(&mtk_gpt->gpt4_clk, GPT_SYS_CLK | GPT_CLK_DIV1);
- /* Set operation mode to FREERUN mode and enable GTP4 */
- write32(&mtk_gpt->gpt4_con, GPT_CON_EN | GPT_MODE_FREERUN);
+ write32(&mtk_gpt->gpt6_clk, GPT_SYS_CLK | GPT_CLK_DIV1);
+ /* Set operation mode to FREERUN mode and enable timer */
+ write32(&mtk_gpt->gpt6_con, GPT_CON_EN | GPT_MODE_FREERUN);
}