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Diffstat (limited to 'src/soc/mediatek/mt8173/ddp.c')
-rw-r--r--src/soc/mediatek/mt8173/ddp.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/src/soc/mediatek/mt8173/ddp.c b/src/soc/mediatek/mt8173/ddp.c
index 9f201fd0d4..555bfe905f 100644
--- a/src/soc/mediatek/mt8173/ddp.c
+++ b/src/soc/mediatek/mt8173/ddp.c
@@ -60,17 +60,17 @@ static void main_disp_path_setup(u32 width, u32 height, u32 pixel_clk)
static void disp_clock_on(void)
{
- clrbits_le32(&mmsys_cfg->mmsys_cg_con0, CG_CON0_SMI_COMMON |
- CG_CON0_SMI_LARB0 |
- CG_CON0_MUTEX_32K |
- CG_CON0_DISP_OVL0 |
- CG_CON0_DISP_RDMA0 |
- CG_CON0_DISP_COLOR0 |
- CG_CON0_DISP_UFOE |
- CG_CON0_DISP_OD);
+ clrbits32(&mmsys_cfg->mmsys_cg_con0, CG_CON0_SMI_COMMON |
+ CG_CON0_SMI_LARB0 |
+ CG_CON0_MUTEX_32K |
+ CG_CON0_DISP_OVL0 |
+ CG_CON0_DISP_RDMA0 |
+ CG_CON0_DISP_COLOR0 |
+ CG_CON0_DISP_UFOE |
+ CG_CON0_DISP_OD);
- clrbits_le32(&mmsys_cfg->mmsys_cg_con1, CG_CON1_DSI0_ENGINE |
- CG_CON1_DSI0_DIGITAL);
+ clrbits32(&mmsys_cfg->mmsys_cg_con1, CG_CON1_DSI0_ENGINE |
+ CG_CON1_DSI0_DIGITAL);
}
void mtk_ddp_init(void)