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Diffstat (limited to 'src/soc/mediatek/mt8173')
-rw-r--r--src/soc/mediatek/mt8173/dramc_pi_calibration_api.c8
-rw-r--r--src/soc/mediatek/mt8173/emi.c6
-rw-r--r--src/soc/mediatek/mt8173/gpio_init.c2
3 files changed, 8 insertions, 8 deletions
diff --git a/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c b/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c
index 7a25bfe8a7..df2eb9c951 100644
--- a/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c
+++ b/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c
@@ -589,9 +589,9 @@ u8 dramk_calcu_best_dly(u8 bit, struct dqs_perbit_dly *p, u8 *p_max_byte)
}
} else if (hold < setup) {
- /* like this: (hold time != 0 )*/
+ /* like this: (hold time != 0)*/
/* xxxoooooooooooooooooo|ooooooooxxxxxxxxxxxxxxxxx */
- /* like this: (hold time == 0 ) */
+ /* like this: (hold time == 0) */
/* xxxoooooooooooooooxxx|xxxxxxxxxxxxxxxxxxxxxxxxx */
p->best_dqsdly = 0;
@@ -972,7 +972,7 @@ void perbit_window_cal(u32 channel, u8 type)
dqdqs_perbit_dly[i].best_last_dqsdly_pass = -2;
}
- /* 1. delay DQ ,find the pass widnow (left boundary)
+ /* 1. delay DQ,find the pass widnow (left boundary)
* 2. delay DQS find the pass window (right boundary)
* 3. find the best DQ / DQS to satify the middle value
* of the overall pass window per bit
@@ -1121,7 +1121,7 @@ void perbit_window_cal(u32 channel, u8 type)
dramc_dbg_msg("DQ Delay :\n");
for (i = 0; i < DATA_WIDTH_32BIT; i++) {
dramc_dbg_msg("DQ%d = %d ", i, dqdqs_perbit_dly[i].best_dqdly);
- if ( ((i + 1) % 4) == 0)
+ if (((i + 1) % 4) == 0)
dramc_dbg_msg("\n");
}
diff --git a/src/soc/mediatek/mt8173/emi.c b/src/soc/mediatek/mt8173/emi.c
index c021303a4d..872ed6cf11 100644
--- a/src/soc/mediatek/mt8173/emi.c
+++ b/src/soc/mediatek/mt8173/emi.c
@@ -138,19 +138,19 @@ size_t sdram_size(void)
if (value & CONA_DUAL_CH_EN)
bit_counter++;
- /* check if 32bit , 32 = 2^5*/
+ /* check if 32bit, 32 = 2^5*/
if (value & CONA_32BIT_EN)
bit_counter += 5;
else
bit_counter += 4;
/* check column address */
- /* 00 is 9 bits, 01 is 10 bits , 10 is 11 bits */
+ /* 00 is 9 bits, 01 is 10 bits, 10 is 11 bits */
bit_counter += ((value & COL_ADDR_BITS_MASK) >> COL_ADDR_BITS_SHIFT) +
9;
/* check if row address */
- /*00 is 13 bits , 01 is 14 bits , 10 is 15bits , 11 is 16 bits */
+ /*00 is 13 bits, 01 is 14 bits, 10 is 15bits, 11 is 16 bits */
bit_counter += ((value & ROW_ADDR_BITS_MASK) >> ROW_ADDR_BITS_SHIFT) +
13;
diff --git a/src/soc/mediatek/mt8173/gpio_init.c b/src/soc/mediatek/mt8173/gpio_init.c
index 79ed316cb5..31c77f5240 100644
--- a/src/soc/mediatek/mt8173/gpio_init.c
+++ b/src/soc/mediatek/mt8173/gpio_init.c
@@ -58,7 +58,7 @@ static void gpio_set_duty(enum external_power ext_power)
}
/* other R/TDSEL */
- /* msdc2_ctrl5 , bit[3:0] = b`1010 */
+ /* msdc2_ctrl5, bit[3:0] = b`1010 */
write16(&mtk_gpio->msdc2_ctrl5.set, 0xA);
write16(&mtk_gpio->msdc2_ctrl5.rst, 0x5);
}