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-rw-r--r--src/soc/nvidia/tegra124/dp.c1
-rw-r--r--src/soc/nvidia/tegra124/sdram_lp0.c1
-rw-r--r--src/soc/nvidia/tegra124/soc.c1
-rw-r--r--src/soc/nvidia/tegra124/sor.c1
4 files changed, 0 insertions, 4 deletions
diff --git a/src/soc/nvidia/tegra124/dp.c b/src/soc/nvidia/tegra124/dp.c
index 7fae4e9a45..b9fa0eae8c 100644
--- a/src/soc/nvidia/tegra124/dp.c
+++ b/src/soc/nvidia/tegra124/dp.c
@@ -17,7 +17,6 @@
*
*/
-#include <arch/io.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
diff --git a/src/soc/nvidia/tegra124/sdram_lp0.c b/src/soc/nvidia/tegra124/sdram_lp0.c
index 5cc5889f87..731fc6155c 100644
--- a/src/soc/nvidia/tegra124/sdram_lp0.c
+++ b/src/soc/nvidia/tegra124/sdram_lp0.c
@@ -32,7 +32,6 @@
* Contrary to U-Boot, we transform the same macros directly into hardcoded
* assignments (without any pesky function calls or volatile qualifiers) to give
* the compiler as much room for optimization as possible. For that reason, we
- * also intentionally avoid <arch/io.h> read/write macros, under the assumption
* that PMC scratch register accesses should not have side effects and can be
* arbitrarily reordered. For the few accesses that do have side-effects, the
* code must contain explicit memory barriers.
diff --git a/src/soc/nvidia/tegra124/soc.c b/src/soc/nvidia/tegra124/soc.c
index e44ea8d32a..9d5e79f8b0 100644
--- a/src/soc/nvidia/tegra124/soc.c
+++ b/src/soc/nvidia/tegra124/soc.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <bootmode.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/soc/nvidia/tegra124/sor.c b/src/soc/nvidia/tegra124/sor.c
index 50d637057b..457f918bd8 100644
--- a/src/soc/nvidia/tegra124/sor.c
+++ b/src/soc/nvidia/tegra124/sor.c
@@ -16,7 +16,6 @@
*
*/
-#include <arch/io.h>
#include <boot/tables.h>
#include <console/console.h>
#include <cpu/cpu.h>