summaryrefslogtreecommitdiff
path: root/src/soc/nvidia/tegra132/psci.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/nvidia/tegra132/psci.c')
-rw-r--r--src/soc/nvidia/tegra132/psci.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra132/psci.c b/src/soc/nvidia/tegra132/psci.c
index 0b5d793aaf..b075ffc353 100644
--- a/src/soc/nvidia/tegra132/psci.c
+++ b/src/soc/nvidia/tegra132/psci.c
@@ -18,9 +18,21 @@
*/
#include <arch/psci.h>
+#include <soc/cpu.h>
+
+static void *cpu_on_entry_point;
void psci_soc_init(uintptr_t cpu_on_entry)
{
+ /*
+ * Stash secmon entry point for CPUs starting up. The 32-bit reset
+ * vector register is accessible in < EL3 so one has to attempt to
+ * plug the potential race for that register being changed out from
+ * under us. Therefore, we set the appropriate registers here, but
+ * it is also done on each CPU_ON request.
+ */
+ cpu_on_entry_point = (void *)cpu_on_entry;
+ cpu_prepare_startup(cpu_on_entry_point);
}
static size_t children_at_level(int parent_level, uint64_t mpidr)