diff options
Diffstat (limited to 'src/soc/nvidia')
| -rw-r--r-- | src/soc/nvidia/tegra124/clock.c | 2 | ||||
| -rw-r--r-- | src/soc/nvidia/tegra132/clock.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/nvidia/tegra124/clock.c b/src/soc/nvidia/tegra124/clock.c index de7b218e25..4c087b8539 100644 --- a/src/soc/nvidia/tegra124/clock.c +++ b/src/soc/nvidia/tegra124/clock.c @@ -389,7 +389,7 @@ clock_display(u32 frequency) /* Initialize the UART and put it on CLK_M so we can use it during clock_init(). * Will later move it to PLLP in clock_config(). The divisor must be very small - * to accomodate 12KHz OSCs, so we override the 16.0 UART divider with the 15.1 + * to accommodate 12KHz OSCs, so we override the 16.0 UART divider with the 15.1 * CLK_SOURCE divider to get more precision. (This might still not be enough for * some OSCs... if you use 13KHz, be prepared to have a bad time.) The 1900 has * been determined through trial and error (must lead to div 13 at 24MHz). */ diff --git a/src/soc/nvidia/tegra132/clock.c b/src/soc/nvidia/tegra132/clock.c index 73b05e0925..0db120d8d2 100644 --- a/src/soc/nvidia/tegra132/clock.c +++ b/src/soc/nvidia/tegra132/clock.c @@ -389,7 +389,7 @@ u32 clock_configure_plld(u32 frequency) /* Initialize the UART and put it on CLK_M so we can use it during clock_init(). * Will later move it to PLLP in clock_config(). The divisor must be very small - * to accomodate 12KHz OSCs, so we override the 16.0 UART divider with the 15.1 + * to accommodate 12KHz OSCs, so we override the 16.0 UART divider with the 15.1 * CLK_SOURCE divider to get more precision. (This might still not be enough for * some OSCs... if you use 13KHz, be prepared to have a bad time.) The 1900 has * been determined through trial and error (must lead to div 13 at 24MHz). */ |