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-rw-r--r--src/soc/qualcomm/ipq40xx/Makefile.inc1
-rw-r--r--src/soc/qualcomm/ipq40xx/cbmem.c16
-rw-r--r--src/soc/qualcomm/ipq40xx/include/soc/soc_services.h3
3 files changed, 20 insertions, 0 deletions
diff --git a/src/soc/qualcomm/ipq40xx/Makefile.inc b/src/soc/qualcomm/ipq40xx/Makefile.inc
index 07ca023e0b..9cf96cfedb 100644
--- a/src/soc/qualcomm/ipq40xx/Makefile.inc
+++ b/src/soc/qualcomm/ipq40xx/Makefile.inc
@@ -16,6 +16,7 @@
ifeq ($(CONFIG_SOC_QC_IPQ40XX),y)
bootblock-y += clock.c
+bootblock-y += cbmem.c
bootblock-y += gpio.c
bootblock-$(CONFIG_SPI_FLASH) += spi.c
bootblock-y += timer.c
diff --git a/src/soc/qualcomm/ipq40xx/cbmem.c b/src/soc/qualcomm/ipq40xx/cbmem.c
index 7aff231be7..05325cceb9 100644
--- a/src/soc/qualcomm/ipq40xx/cbmem.c
+++ b/src/soc/qualcomm/ipq40xx/cbmem.c
@@ -16,7 +16,23 @@
#include <cbmem.h>
#include <soc/soc_services.h>
+static int cbmem_backing_store_ready;
+
+void ipq_cbmem_backing_store_ready(void)
+{
+ cbmem_backing_store_ready = 1;
+}
+
void *cbmem_top(void)
{
+ /*
+ * In romstage, make sure that cbmem backing store is ready before
+ * returning pointer to cbmem top. Otherwise, it could lead to issues
+ * with components that utilize cbmem in romstage (e.g. vboot_locator
+ * for loading ipq blobs before DRAM is initialized).
+ */
+ if (ENV_ROMSTAGE && (cbmem_backing_store_ready == 0))
+ return NULL;
+
return _memlayout_cbmem_top;
}
diff --git a/src/soc/qualcomm/ipq40xx/include/soc/soc_services.h b/src/soc/qualcomm/ipq40xx/include/soc/soc_services.h
index 5ad11f1a10..98147cf656 100644
--- a/src/soc/qualcomm/ipq40xx/include/soc/soc_services.h
+++ b/src/soc/qualcomm/ipq40xx/include/soc/soc_services.h
@@ -32,4 +32,7 @@ int tz_init_wrapper(int, int, void *);
/* Load RPM code into memory and trigger its execution. */
void start_rpm(void);
+/* Mark cbmem backing store as ready. */
+void ipq_cbmem_backing_store_ready(void);
+
#endif