summaryrefslogtreecommitdiff
path: root/src/soc/qualcomm
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/qualcomm')
-rw-r--r--src/soc/qualcomm/sdm845/Makefile.inc3
-rw-r--r--src/soc/qualcomm/sdm845/aop_load_reset.c43
-rw-r--r--src/soc/qualcomm/sdm845/clock.c8
-rw-r--r--src/soc/qualcomm/sdm845/include/soc/addressmap.h1
-rw-r--r--src/soc/qualcomm/sdm845/include/soc/aop.h21
-rw-r--r--src/soc/qualcomm/sdm845/include/soc/clock.h6
-rw-r--r--src/soc/qualcomm/sdm845/include/soc/memlayout.ld16
-rw-r--r--src/soc/qualcomm/sdm845/include/soc/symbols.h2
-rw-r--r--src/soc/qualcomm/sdm845/mmu.c5
-rw-r--r--src/soc/qualcomm/sdm845/soc.c3
10 files changed, 98 insertions, 10 deletions
diff --git a/src/soc/qualcomm/sdm845/Makefile.inc b/src/soc/qualcomm/sdm845/Makefile.inc
index 78b3568a8b..c20be142b6 100644
--- a/src/soc/qualcomm/sdm845/Makefile.inc
+++ b/src/soc/qualcomm/sdm845/Makefile.inc
@@ -39,6 +39,9 @@ ramstage-y += gpio.c
ramstage-y += clock.c
ramstage-$(CONFIG_SDM845_QSPI) += qspi.c
ramstage-y += usb.c
+ramstage-y += gpio.c
+ramstage-y += clock.c
+ramstage-y += aop_load_reset.c
################################################################################
diff --git a/src/soc/qualcomm/sdm845/aop_load_reset.c b/src/soc/qualcomm/sdm845/aop_load_reset.c
new file mode 100644
index 0000000000..02217f9bd3
--- /dev/null
+++ b/src/soc/qualcomm/sdm845/aop_load_reset.c
@@ -0,0 +1,43 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <string.h>
+#include <arch/cache.h>
+#include <cbfs.h>
+#include <halt.h>
+#include <console/console.h>
+#include <timestamp.h>
+#include <soc/mmu.h>
+#include <soc/aop.h>
+#include <soc/clock.h>
+
+void aop_fw_load_reset(void)
+{
+ bool aop_fw_entry;
+
+ struct prog aop_fw_prog =
+ PROG_INIT(PROG_PAYLOAD, CONFIG_CBFS_PREFIX "/aop");
+
+ if (prog_locate(&aop_fw_prog))
+ die("SOC image: AOP_FW not found");
+
+ aop_fw_entry = selfload(&aop_fw_prog);
+ if (!aop_fw_entry)
+ die("SOC image: AOP load failed");
+
+ clock_reset_aop();
+
+ printk(BIOS_DEBUG, "\nSOC:AOP brought out of reset.\n");
+}
diff --git a/src/soc/qualcomm/sdm845/clock.c b/src/soc/qualcomm/sdm845/clock.c
index addac5ef40..e55495b86e 100644
--- a/src/soc/qualcomm/sdm845/clock.c
+++ b/src/soc/qualcomm/sdm845/clock.c
@@ -17,10 +17,13 @@
#include <types.h>
#include <commonlib/helpers.h>
#include <assert.h>
+#include <soc/symbols.h>
#include <soc/clock.h>
#define DIV(div) (2*div - 1)
+#define AOP_LOADED_SIGNAL_FLAG 0x11223344
+
struct clock_config qup_cfg[] = {
{
.hz = 7372800,
@@ -146,9 +149,10 @@ static int clock_enable(void *cbcr_addr)
void clock_reset_aop(void)
{
-
/* Bring AOP out of RESET */
- clrbits_le32(&aoss->aoss_cc_apcs_misc, BIT(AOP_RESET_SHFT));
+ uint32_t *mailbox;
+ mailbox = (uint32_t *)_aop_ss_msg_ram_drv15;
+ *mailbox = AOP_LOADED_SIGNAL_FLAG;
}
void clock_configure_qspi(uint32_t hz)
diff --git a/src/soc/qualcomm/sdm845/include/soc/addressmap.h b/src/soc/qualcomm/sdm845/include/soc/addressmap.h
index bf4b30b32b..70caa169aa 100644
--- a/src/soc/qualcomm/sdm845/include/soc/addressmap.h
+++ b/src/soc/qualcomm/sdm845/include/soc/addressmap.h
@@ -23,7 +23,6 @@
#define TLMM_NORTH_TILE_BASE 0x03900000
#define TLMM_SOUTH_TILE_BASE 0x03D00000
#define GCC_BASE 0x00100000
-#define AOSS_CC_BASE 0x0C2F0000
/*
* USB BASE ADDRESSES
diff --git a/src/soc/qualcomm/sdm845/include/soc/aop.h b/src/soc/qualcomm/sdm845/include/soc/aop.h
new file mode 100644
index 0000000000..cadf21b7bd
--- /dev/null
+++ b/src/soc/qualcomm/sdm845/include/soc/aop.h
@@ -0,0 +1,21 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _SOC_QUALCOMM_SDM845_AOP_H__
+#define _SOC_QUALCOMM_SDM845_AOP_H__
+
+void aop_fw_load_reset(void);
+
+#endif // _SOC_QUALCOMM_SDM845_AOP_H__
diff --git a/src/soc/qualcomm/sdm845/include/soc/clock.h b/src/soc/qualcomm/sdm845/include/soc/clock.h
index ea4d87d812..1f79d95195 100644
--- a/src/soc/qualcomm/sdm845/include/soc/clock.h
+++ b/src/soc/qualcomm/sdm845/include/soc/clock.h
@@ -123,11 +123,6 @@ check_member(sdm845_gcc, usb3_phy_sec_bcr, 0x5000c);
check_member(sdm845_gcc, usb3phy_phy_sec_bcr, 0x50010);
check_member(sdm845_gcc, apcs_clk_br_en1, 0x5200c);
-struct sdm845_aoss {
- u8 _res[0x2c];
- u32 aoss_cc_apcs_misc;
-};
-
enum clk_ctl_gpll_user_ctl {
CLK_CTL_GPLL_PLLOUT_EVEN_BMSK = 0x2,
CLK_CTL_GPLL_PLLOUT_MAIN_SHFT = 0,
@@ -201,7 +196,6 @@ struct clock_config {
};
static struct sdm845_gcc *const gcc = (void *)GCC_BASE;
-static struct sdm845_aoss *const aoss = (void *)AOSS_CC_BASE;
void clock_init(void);
void clock_reset_aop(void);
diff --git a/src/soc/qualcomm/sdm845/include/soc/memlayout.ld b/src/soc/qualcomm/sdm845/include/soc/memlayout.ld
index b1b633317f..b0d2d43f4b 100644
--- a/src/soc/qualcomm/sdm845/include/soc/memlayout.ld
+++ b/src/soc/qualcomm/sdm845/include/soc/memlayout.ld
@@ -24,8 +24,24 @@
#define BSRAM_START(addr) SYMBOL(bsram, addr)
#define BSRAM_END(addr) SYMBOL(ebsram, addr)
+/* AOP : 0x0B000000 - 0x0B100000 */
+#define AOPSRAM_START(addr) SYMBOL(aopsram, addr)
+#define AOPSRAM_END(addr) SYMBOL(eaopsram, addr)
+
+/* AOPMSG : 0x0C300000 - 0x0C400000 */
+#define AOPMSG_START(addr) SYMBOL(aopmsg, addr)
+#define AOPMSG_END(addr) SYMBOL(eaopmsg, addr)
+
SECTIONS
{
+ AOPSRAM_START(0x0B000000)
+ REGION(aop, 0x0B000000, 0x100000, 4096)
+ AOPSRAM_END(0x0B100000)
+
+ AOPMSG_START(0x0C300000)
+ REGION(aop_ss_msg_ram_drv15, 0x0C3F0000, 0x400, 0x100)
+ AOPMSG_END(0x0C400000)
+
SSRAM_START(0x14680000)
OVERLAP_VERSTAGE_ROMSTAGE(0x14680000, 100K)
DMA_COHERENT(0x14699000, 8K)
diff --git a/src/soc/qualcomm/sdm845/include/soc/symbols.h b/src/soc/qualcomm/sdm845/include/soc/symbols.h
index e7bf1b2aea..f01f245a92 100644
--- a/src/soc/qualcomm/sdm845/include/soc/symbols.h
+++ b/src/soc/qualcomm/sdm845/include/soc/symbols.h
@@ -24,5 +24,7 @@ DECLARE_REGION(dram_reserved)
DECLARE_REGION(dcb);
DECLARE_REGION(pmic);
DECLARE_REGION(limits_cfg);
+DECLARE_REGION(aop);
+DECLARE_REGION(aop_ss_msg_ram_drv15);
#endif // _SOC_QUALCOMM_SDM845_SYMBOLS_H_
diff --git a/src/soc/qualcomm/sdm845/mmu.c b/src/soc/qualcomm/sdm845/mmu.c
index ec5fa55de2..e63bfed690 100644
--- a/src/soc/qualcomm/sdm845/mmu.c
+++ b/src/soc/qualcomm/sdm845/mmu.c
@@ -32,3 +32,8 @@ void sdm845_mmu_init(void)
mmu_enable();
}
+
+void soc_mmu_dram_config_post_dram_init(void)
+{
+ mmu_config_range((void *)_aop, REGION_SIZE(aop), CACHED_RAM);
+}
diff --git a/src/soc/qualcomm/sdm845/soc.c b/src/soc/qualcomm/sdm845/soc.c
index ef283c0eae..14394f78c2 100644
--- a/src/soc/qualcomm/sdm845/soc.c
+++ b/src/soc/qualcomm/sdm845/soc.c
@@ -18,6 +18,7 @@
#include <soc/mmu.h>
#include <soc/mmu_common.h>
#include <soc/symbols.h>
+#include <soc/aop.h>
static void soc_read_resources(struct device *dev)
{
@@ -29,7 +30,7 @@ static void soc_read_resources(struct device *dev)
static void soc_init(struct device *dev)
{
-
+ aop_fw_load_reset();
}
static struct device_operations soc_ops = {