summaryrefslogtreecommitdiff
path: root/src/soc/samsung/exynos5420/dmc_init_ddr3.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/samsung/exynos5420/dmc_init_ddr3.c')
-rw-r--r--src/soc/samsung/exynos5420/dmc_init_ddr3.c13
1 files changed, 1 insertions, 12 deletions
diff --git a/src/soc/samsung/exynos5420/dmc_init_ddr3.c b/src/soc/samsung/exynos5420/dmc_init_ddr3.c
index 90ad93298a..5a7c45dc39 100644
--- a/src/soc/samsung/exynos5420/dmc_init_ddr3.c
+++ b/src/soc/samsung/exynos5420/dmc_init_ddr3.c
@@ -1,17 +1,6 @@
/* This file is part of the coreboot project. */
/* DDR3 mem setup file for EXYNOS5 based board */
-/*
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
+/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <device/mmio.h>
#include <delay.h>