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-rw-r--r--src/soc/samsung/exynos5250/clock.c4
-rw-r--r--src/soc/samsung/exynos5420/clock.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/samsung/exynos5250/clock.c b/src/soc/samsung/exynos5250/clock.c
index 1de2ab2420..a00af0232a 100644
--- a/src/soc/samsung/exynos5250/clock.c
+++ b/src/soc/samsung/exynos5250/clock.c
@@ -475,8 +475,8 @@ void clock_ll_set_ratio(enum periph_id periph_id, unsigned divisor)
*
* @param main_scalar_bits Number of main scalar bits, must be > 0 and < 32
* @param fine_scalar_bits Number of fine scalar bits, must be > 0 and < 32
- * @param input_freq Clock frequency to be scaled in Hz
- * @param target_freq Desired clock frequency in Hz
+ * @param input_rate Clock frequency to be scaled in Hz
+ * @param target_rate Desired clock frequency in Hz
* @param best_fine_scalar Pointer to store the fine stage divisor
*
* @return best_main_scalar Main scalar for desired frequency or -1 if none
diff --git a/src/soc/samsung/exynos5420/clock.c b/src/soc/samsung/exynos5420/clock.c
index 5bbeb04ffe..5cf3583c87 100644
--- a/src/soc/samsung/exynos5420/clock.c
+++ b/src/soc/samsung/exynos5420/clock.c
@@ -439,8 +439,8 @@ void clock_ll_set_ratio(enum periph_id periph_id, unsigned divisor)
*
* @param main_scalar_bits Number of main scalar bits, must be > 0 and < 32
* @param fine_scalar_bits Number of fine scalar bits, must be > 0 and < 32
- * @param input_freq Clock frequency to be scaled in Hz
- * @param target_freq Desired clock frequency in Hz
+ * @param input_rate Clock frequency to be scaled in Hz
+ * @param target_rate Desired clock frequency in Hz
* @param best_fine_scalar Pointer to store the fine stage divisor
*
* @return best_main_scalar Main scalar for desired frequency or -1 if none