diff options
Diffstat (limited to 'src/soc/samsung')
| -rw-r--r-- | src/soc/samsung/exynos5420/clock_init.c | 4 | ||||
| -rw-r--r-- | src/soc/samsung/exynos5420/fimd.c | 20 |
2 files changed, 12 insertions, 12 deletions
diff --git a/src/soc/samsung/exynos5420/clock_init.c b/src/soc/samsung/exynos5420/clock_init.c index ea4778b931..295ef399c2 100644 --- a/src/soc/samsung/exynos5420/clock_init.c +++ b/src/soc/samsung/exynos5420/clock_init.c @@ -41,7 +41,7 @@ void system_clock_init(void) write32(&exynos_clock->ipll_lock, IPLL_LOCK_VAL); write32(&exynos_clock->spll_lock, SPLL_LOCK_VAL); write32(&exynos_clock->kpll_lock, KPLL_LOCK_VAL); - write32(&exynos_clock->rpll_lock, RPLL_LOCK_VAL); + write32(&exynos_clock->rpll_lock, RPLL_LOCK_VAL); setbits_le32(&exynos_clock->clk_src_cpu, MUX_HPM_SEL_MASK); @@ -138,7 +138,7 @@ void system_clock_init(void) while ((read32(&exynos_clock->spll_con0) & PLL_LOCKED) == 0) ; - /* We use RPLL as the source for FIMD video stream clock */ + /* We use RPLL as the source for FIMD video stream clock */ write32(&exynos_clock->rpll_con1, RPLL_CON1_VAL); write32(&exynos_clock->rpll_con2, RPLL_CON2_VAL); /* computed by gabe from first principles; u-boot is probably diff --git a/src/soc/samsung/exynos5420/fimd.c b/src/soc/samsung/exynos5420/fimd.c index a7adf9347c..aa850bcb81 100644 --- a/src/soc/samsung/exynos5420/fimd.c +++ b/src/soc/samsung/exynos5420/fimd.c @@ -304,16 +304,16 @@ void exynos_fimd_window_off(unsigned int win_id) static void exynos5_set_system_display(void) { - unsigned int cfg = 0; - - /* - * system register path set - * 0: MIE/MDNIE - * 1: FIMD Bypass - */ - cfg = lreadl(&exynos_sysreg->disp1blk_cfg); - cfg |= (1 << 15); - lwritel(cfg, &exynos_sysreg->disp1blk_cfg); + unsigned int cfg = 0; + + /* + * system register path set + * 0: MIE/MDNIE + * 1: FIMD Bypass + */ + cfg = lreadl(&exynos_sysreg->disp1blk_cfg); + cfg |= (1 << 15); + lwritel(cfg, &exynos_sysreg->disp1blk_cfg); } void exynos_fimd_lcd_init(vidinfo_t *vid) |