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-rw-r--r--src/soc/intel/quark/Makefile.inc3
-rw-r--r--src/soc/intel/quark/uart.c42
-rw-r--r--src/soc/intel/quark/uart_common.c29
3 files changed, 58 insertions, 16 deletions
diff --git a/src/soc/intel/quark/Makefile.inc b/src/soc/intel/quark/Makefile.inc
index f107fdf6c6..90398d2c13 100644
--- a/src/soc/intel/quark/Makefile.inc
+++ b/src/soc/intel/quark/Makefile.inc
@@ -20,12 +20,13 @@ subdirs-y += ../../../cpu/x86/tsc
romstage-y += memmap.c
romstage-y += tsc_freq.c
-romstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart.c
+romstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart_common.c
ramstage-y += chip.c
ramstage-y += memmap.c
ramstage-y += northcluster.c
ramstage-y += tsc_freq.c
+ramstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart_common.c
ramstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart.c
CPPFLAGS_common += -I$(src)/soc/intel/quark
diff --git a/src/soc/intel/quark/uart.c b/src/soc/intel/quark/uart.c
index 2b5b398143..b97fceafee 100644
--- a/src/soc/intel/quark/uart.c
+++ b/src/soc/intel/quark/uart.c
@@ -15,26 +15,38 @@
* GNU General Public License for more details.
*/
-// Use simple device model for this file even in ramstage
-#define __SIMPLE_DEVICE__
-
#include <console/uart.h>
#include <device/pci.h>
#include <device/pci_def.h>
-#include <rules.h>
-#include <soc/pci_devs.h>
+#include <device/pci_ids.h>
-unsigned int uart_platform_refclk(void)
+static void uart_read_resources(device_t dev)
{
- return 44236800;
-}
+ struct resource *res;
-uintptr_t uart_platform_base(int idx)
-{
- /* HSUART controller #1 (B0:D20:F5). */
- device_t dev = PCI_DEV(0, HSUART1_DEV, HSUART1_FUNC);
+ /* Read the resources */
+ pci_dev_read_resources(dev);
- /* UART base address at BAR0(offset 0x10). */
- return (unsigned int) (pci_read_config32(dev,
- PCI_BASE_ADDRESS_0) & ~0xfff);
+ /* Set the debug port configuration */
+ res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res->base = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
+ res->size = 0x100;
+ res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}
+
+static struct device_operations device_ops = {
+ .read_resources = &uart_read_resources,
+ .set_resources = &pci_dev_set_resources,
+ .enable_resources = &pci_dev_enable_resources,
+};
+
+static const unsigned short uart_ids[] = {
+ 0x0936, /* HSUART0, HSUART1 */
+ 0
+};
+
+static const struct pci_driver uart_driver __pci_driver = {
+ .ops = &device_ops,
+ .vendor = PCI_VENDOR_ID_INTEL,
+ .devices = uart_ids,
+};
diff --git a/src/soc/intel/quark/uart_common.c b/src/soc/intel/quark/uart_common.c
new file mode 100644
index 0000000000..4408d878f5
--- /dev/null
+++ b/src/soc/intel/quark/uart_common.c
@@ -0,0 +1,29 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2003 Eric Biederman
+ * Copyright (C) 2006-2010 coresystems GmbH
+ * Copyright (C) 2015-2016 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <console/uart.h>
+#include <soc/iomap.h>
+
+unsigned int uart_platform_refclk(void)
+{
+ return 44236800;
+}
+
+uintptr_t uart_platform_base(int idx)
+{
+ return UART_BASE_ADDRESS;
+}