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-rw-r--r--src/soc/qualcomm/sc7280/Makefile.inc25
-rw-r--r--src/soc/qualcomm/sc7280/memlayout.ld6
2 files changed, 27 insertions, 4 deletions
diff --git a/src/soc/qualcomm/sc7280/Makefile.inc b/src/soc/qualcomm/sc7280/Makefile.inc
index 4edffb050d..3fc9d88b60 100644
--- a/src/soc/qualcomm/sc7280/Makefile.inc
+++ b/src/soc/qualcomm/sc7280/Makefile.inc
@@ -25,7 +25,6 @@ CPPFLAGS_common += -Isrc/soc/qualcomm/common/include
SC7280_BLOB := $(top)/3rdparty/qc_blobs/sc7280
################################################################################
-
QC_SEC_FILE := $(SC7280_BLOB)/qc_sec/qc_sec.mbn
$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.elf
@util/qualcomm/createxbl.py --mbn_version 6 -f $(objcbfs)/bootblock.raw.elf \
@@ -35,4 +34,28 @@ $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.elf
@util/qualcomm/qgpt.py $(objcbfs)/merged_bb_qcsec.mbn \
$(objcbfs)/bootblock.bin
+################################################################################
+QCLIB_FILE := $(SC7280_BLOB)/boot/QcLib.elf
+QCLIB_CBFS := $(CONFIG_CBFS_PREFIX)/qclib
+$(QCLIB_CBFS)-file := $(QCLIB_FILE)
+$(QCLIB_CBFS)-type := stage
+$(QCLIB_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG)
+cbfs-files-y += $(QCLIB_CBFS)
+
+################################################################################
+PMIC_FILE := $(SC7280_BLOB)/boot/Pmic.bin
+PMIC_CBFS := $(CONFIG_CBFS_PREFIX)/pmiccfg
+$(PMIC_CBFS)-file := $(PMIC_FILE)
+$(PMIC_CBFS)-type := raw
+$(PMIC_CBFS)-compression := $(CBFS_COMPRESS_FLAG)
+cbfs-files-y += $(PMIC_CBFS)
+
+################################################################################
+DCB_FILE := $(SC7280_BLOB)/boot/dcb.bin
+DCB_CBFS := $(CONFIG_CBFS_PREFIX)/dcb
+$(DCB_CBFS)-file := $(DCB_FILE)
+$(DCB_CBFS)-type := raw
+$(DCB_CBFS)-compression := $(CBFS_COMPRESS_FLAG)
+cbfs-files-y += $(DCB_CBFS)
+
endif
diff --git a/src/soc/qualcomm/sc7280/memlayout.ld b/src/soc/qualcomm/sc7280/memlayout.ld
index 24b79f9bc5..7b6f5a3d04 100644
--- a/src/soc/qualcomm/sc7280/memlayout.ld
+++ b/src/soc/qualcomm/sc7280/memlayout.ld
@@ -41,9 +41,9 @@ SECTIONS
REGION(ddr_information, 0x1485B000, 1K, 1K)
FMAP_CACHE(0x1485B400, 2K)
CBFS_MCACHE(0x1485BC00,8K)
- REGION(dcb, 0x14875000, 32K, 4K)
- REGION(pmic, 0x1487D000, 96K, 4K)
- REGION(qclib, 0x14895000, 748K, 4K)
+ REGION(dcb, 0x1485E000, 32K, 4K)
+ REGION(pmic, 0x14866000, 96K, 4K)
+ REGION(qclib, 0x1487E000, 840K, 4K)
BSRAM_END(0x14950000)
DRAM_START(0x80000000)