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-rw-r--r--src/soc/intel/skylake/chip.c1
-rw-r--r--src/soc/intel/skylake/chip.h5
2 files changed, 0 insertions, 6 deletions
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index c9519cdc29..ef16f388d7 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -338,7 +338,6 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->PchPmSlpS4MinAssert = config->PmConfigSlpS4MinAssert;
params->PchPmSlpSusMinAssert = config->PmConfigSlpSusMinAssert;
params->PchPmSlpAMinAssert = config->PmConfigSlpAMinAssert;
- params->PchPmLpcClockRun = config->PmConfigPciClockRun;
params->PchPmSlpStrchSusUp = config->PmConfigSlpStrchSusUp;
params->PchPmPwrBtnOverridePeriod =
config->PmConfigPwrBtnOverridePeriod;
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index f4744c9631..7d9d93460c 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -377,11 +377,6 @@ struct soc_intel_skylake_config {
} PmConfigSlpAMinAssert;
/*
- * This member describes whether or not the PCI ClockRun feature of PCH
- * should be enabled. Values 0: Disabled, 1: Enabled
- */
- u8 PmConfigPciClockRun;
- /*
* SLP_X Stretching After SUS Well Power Up. Values 0: Disabled,
* 1: Enabled
*/