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-rw-r--r--src/soc/intel/apollolake/Kconfig18
-rw-r--r--src/soc/intel/apollolake/chip.h3
-rw-r--r--src/soc/intel/apollolake/graphics.c7
3 files changed, 28 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 4f762a9cd0..62049b5abe 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -413,4 +413,22 @@ config RO_REGION_ONLY
string
default "pdpt pt"
+config INTEL_GMA_PANEL_2
+ bool
+ default n
+
+config INTEL_GMA_BCLV_OFFSET
+ default 0xc8358 if INTEL_GMA_PANEL_2
+ default 0xc8258
+
+config INTEL_GMA_BCLV_WIDTH
+ default 32
+
+config INTEL_GMA_BCLM_OFFSET
+ default 0xc8354 if INTEL_GMA_PANEL_2
+ default 0xc8254
+
+config INTEL_GMA_BCLM_WIDTH
+ default 32
+
endif
diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h
index c94b7ef180..482b333306 100644
--- a/src/soc/intel/apollolake/chip.h
+++ b/src/soc/intel/apollolake/chip.h
@@ -41,6 +41,9 @@ struct soc_intel_apollolake_config {
*/
struct i915_gpu_panel_config panel_cfg[2];
+ /* i915 struct for GMA backlight control */
+ struct i915_gpu_controller_info gfx;
+
/*
* Mapping from PCIe root port to CLKREQ input on the SOC. The SOC has
* four CLKREQ inputs, but six root ports. Root ports without an
diff --git a/src/soc/intel/apollolake/graphics.c b/src/soc/intel/apollolake/graphics.c
index c24ccdfee2..257222fdee 100644
--- a/src/soc/intel/apollolake/graphics.c
+++ b/src/soc/intel/apollolake/graphics.c
@@ -74,3 +74,10 @@ void graphics_soc_panel_init(struct device *const dev)
for (i = 0; i < ARRAY_SIZE(conf->panel_cfg); ++i)
graphics_configure_backlight(&conf->panel_cfg[i], mmio, i);
}
+
+const struct i915_gpu_controller_info *
+intel_igd_get_controller_info(const struct device *device)
+{
+ struct soc_intel_apollolake_config *chip = device->chip_info;
+ return &chip->gfx;
+}