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-rw-r--r--src/soc/intel/broadwell/bootblock/systemagent.c4
-rw-r--r--src/soc/intel/common/block/systemagent/systemagent.c2
-rw-r--r--src/soc/intel/common/block/systemagent/systemagent_def.h2
3 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/broadwell/bootblock/systemagent.c b/src/soc/intel/broadwell/bootblock/systemagent.c
index ef55699df3..5edfaeecaf 100644
--- a/src/soc/intel/broadwell/bootblock/systemagent.c
+++ b/src/soc/intel/broadwell/bootblock/systemagent.c
@@ -11,12 +11,12 @@ void bootblock_early_northbridge_init(void)
/*
* The "io" variant of the config access is explicitly used to
- * setup the PCIEXBAR because CONFIG_MMCONF_SUPPORT is set to
+ * setup the PCIEXBAR because CONFIG(MMCONF_SUPPORT) is set to
* to true. That way all subsequent non-explicit config accesses use
* MCFG. This code also assumes that bootblock_northbridge_init() is
* the first thing called in the non-asm boot block code. The final
* assumption is that no assembly code is using the
- * CONFIG_MMCONF_SUPPORT option to do PCI config accesses.
+ * CONFIG(MMCONF_SUPPORT) option to do PCI config accesses.
*
* The PCIEXBAR is assumed to live in the memory mapped IO space under
* 4GiB.
diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c
index 72d611a2cc..e12e07c376 100644
--- a/src/soc/intel/common/block/systemagent/systemagent.c
+++ b/src/soc/intel/common/block/systemagent/systemagent.c
@@ -226,7 +226,7 @@ static void imr_resource(struct device *dev, int idx, uint32_t base,
/*
* Add IMR ranges that hang off the host bridge/memory
- * controller device in case CONFIG_SA_ENABLE_IMR is selected by SoC.
+ * controller device in case CONFIG(SA_ENABLE_IMR) is selected by SoC.
*/
static void sa_add_imr_resources(struct device *dev, int *resource_cnt)
{
diff --git a/src/soc/intel/common/block/systemagent/systemagent_def.h b/src/soc/intel/common/block/systemagent/systemagent_def.h
index a7823c347c..149e9b6ace 100644
--- a/src/soc/intel/common/block/systemagent/systemagent_def.h
+++ b/src/soc/intel/common/block/systemagent/systemagent_def.h
@@ -40,7 +40,7 @@
#define MCH_PAIR 0x5418
/*
- * IMR register in case CONFIG_SA_ENABLE_IMR is selected by SoC.
+ * IMR register in case CONFIG(SA_ENABLE_IMR) is selected by SoC.
*
* IMR registers are found under MCHBAR.
*/