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-rw-r--r--src/soc/intel/apollolake/romstage.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index 1db2982214..a8a0dd1d44 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -304,6 +304,17 @@ static void soc_memory_init_params(FSPM_UPD *mupd)
die("Can not find SoC devicetree\n");
m_cfg->PrmrrSize = config->PrmrrSize;
+
+ /* FSP performs a PERST# signal deassertion for PCIe ports with
+ * the GPIO address specified in these UPDs. Over-ride the default
+ * addresses with 0 to bypass PERST# signal deassertion in FSP.
+ */
+ m_cfg->RootPort0Perst = 0;
+ m_cfg->RootPort1Perst = 0;
+ m_cfg->RootPort2Perst = 0;
+ m_cfg->RootPort3Perst = 0;
+ m_cfg->RootPort4Perst = 0;
+ m_cfg->RootPort5Perst = 0;
#endif
}