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-rw-r--r--src/soc/intel/tigerlake/chip.h4
-rw-r--r--src/soc/intel/tigerlake/fsp_params_tgl.c4
2 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index e57abe857b..a6bcf0847f 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -208,6 +208,10 @@ struct soc_intel_tigerlake_config {
/* Enable Pch iSCLK */
uint8_t pch_isclk;
+ /* CNVi */
+ uint8_t CnviMode;
+ uint8_t CnviBtCore;
+
/* CNVi BT Audio Offload: Enable/Disable BT Audio Offload. */
enum {
FORCE_DISABLE,
diff --git a/src/soc/intel/tigerlake/fsp_params_tgl.c b/src/soc/intel/tigerlake/fsp_params_tgl.c
index 9e22b58e7c..0dae0fed47 100644
--- a/src/soc/intel/tigerlake/fsp_params_tgl.c
+++ b/src/soc/intel/tigerlake/fsp_params_tgl.c
@@ -149,6 +149,10 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
else
params->PchLanEnable = dev->enabled;
+ /* CNVi */
+ params->CnviMode = config->CnviMode;
+ params->CnviBtCore = config->CnviBtCore;
+
/* Legacy 8254 timer support */
params->Enable8254ClockGating = !CONFIG_USE_LEGACY_8254_TIMER;
params->Enable8254ClockGatingOnS3 = !CONFIG_USE_LEGACY_8254_TIMER;